Compatible PC | EPFL Graph Search

Un compatible PC est un ordinateur compatible avec la gamme d'ordinateurs personnels issue de l'IBM PC, apparu en 1981. En 2012, presque tous les ordinateurs personnels à clavier physique et/ou de bureau sont des compatibles PC. Ils sont basés sur les microprocesseurs de la famille x86 inventée par Intel. Les systèmes d'exploitation MS-DOS, Windows, OS/2 et GNU/Linux ont notamment été créés pour les compatibles PC. Mac OS X a été également porté sur cette architecture depuis le passage d'Apple à des processeurs Intel en 2006. Origines Au début des années 1980, un compatible PC était une machine se comportant comme un IBM PC (PC pour Personal Computer, littéralement « ordinateur individuel ») produit par IBM en 1981. On utilise alors le sigle PC par opposition aux autres ordinateurs personnels qui ne sont pas compatibles avec ce premier PC : Apple Macintosh, Atari ST, Amiga, Commodore 64, Thomson, Amstrad, Sinclair, Tandy, etc. Ainsi, la catégorie des ordinateurs personnels

Routing for Wireless Sensor Networks: From Collection to Event-Triggered Applications

Daniel Camilo Rojas Quirós

Wireless Sensor Networks (WSNs) are collections of sensing devices using wireless communication to exchange data. In the past decades, steep advancements in the areas of microelectronics and communication systems have driven an explosive growth in the deployment of WSNs. Novel WSN applications have penetrated multiple areas, from monitoring the structural stability of historic buildings, to tracking animals in order to understand their behavior, or monitoring humans' health. The need to convey data from increasingly complex applications in a reliable and cost-effective manner translates into stringent performance requirements for the underlying WSNs. In the frame of this thesis, we have focused on developing routing protocols for multi-hop WSNs, that significantly improve their reliability, energy consumption and latency. Acknowledging the need for application-specific trade-offs, we have split our contribution into two parts. Part 1 focuses on collection protocols, catering to applications with high reliability and energy efficiency constraints, while the protocols developed in part 2 are subject to an additional bounded latency constraint. The two mechanisms introduced in the first part, WiseNE and Rep, enable the use of composite metrics, and thus significantly improve the link estimation accuracy and transmission reliability, at an energy expense far lower than the one achieved in previous proposals. The novel beaconing scheme WiseNE enables the energy-efficient addition of the RSSI (Received Signal Strength Indication) and LQI (Link Quality Indication) metrics to the link quality estimate by decoupling the sampling and exploration periods of each mote. This decoupling allows the use of the Trickle Algorithm, a key driver of protocols' energy efficiency, in conjunction with composite metrics. WiseNE has been applied to the Triangle Metric and validated in an online deployment. The section continues by introducing Rep, a novel sampling mechanism that leverages the packet repetitions already present in low-power preamble-sampling MAC protocols in order to improve the WSN energy consumption by one order of magnitude. WiseNE, Rep and the novel PRSSI (Penalized RSSI, a combination of PRR and RSSI) composite metric have been validated in a real smart city deployment. Part 2 introduces two mechanisms that were developed in the frame of the WiseSkin project (an initiative aimed at designing highly sensitive artificial skin for human limb prostheses), and are generally applicable to the domain of cyber-physical systems. It starts with Glossy-W, a protocol that leverages the superior energy-latency trade-off of flooding schemes based on concurrent transmissions. Glossy-W ensures the stringent synchronization requirements necessary for robust flooding, irrespective of the number of motes simultaneously reporting an event. Part 2 also introduces SCS (Synchronized Channel Sampling), a novel mechanism capable of reducing the power required for periodic polling, while maintaining the event detection reliability, and enhancing the network coexistence. The testbed experiments performed show that SCS manages to reduce the energy consumption of the state-of-the-art protocol Back-to-Back Robust Flooding by over one third, while maintaining an equivalent reliability, and remaining compatible with simultaneous event detection. SCS' benefits can be extended to the entire family of state-of-the-art protocols relying on concurrent transmissions.

EPFL2018

CMOS planar 2D micro-fluxgate sensor

Pavel Kejik, Radivoje Popovic

An electronic compass made of a new planar 2D micro-fluxgate sensor is presented. The magnetometer is integrated in a standard CMOS process, and uses a post-processed cross-shaped ferromagnetic amorphous core. This core is diagonally placed above a single square excitation coil common to both measurement axes. The silicon chip includes the driving and readout electronics, the excitation and pick-up coils made of the two CMOS process metallization layers. The ferromagnetic core is integrated from commercially available amorphous metal ribbons, by using a post-process compatible with standard IC technologies. Such a ferromagnetic core presents outstanding magnetic characteristics compared to usual electroplated cores. The micro-fluxgate works with a pulse-shaped driving current which allows the sensor output to be independent of the driving frequency. The current pulse width ratio of 1/8 reduces drastically the power consumption. For magnetic fields within "60 mT, the micro-fluxgate sensor exhibits a magnetic sensitivity of 3760 VrT at 125 kHz with an amplification gain of 26.4 dB. The angle error on the Earth’s magnetic field is "1.58. The chip has a power consumption of 12.5 mW for a 17 mA-peak driving current; its area is of 5.3 mm2.

Elsevier2000

CMOS planar 2D micro-fluxgate sensor

Pavel Kejik, Radivoje Popovic

An electronic compass made of a new planar 2D micro-fluxgate sensor is presented. The magnetometer is integrated in a standard CMOS process, and uses a post-processed cross shape ferromagnetic amorphous core. This core is diagonally placed above a single square excitation coil common to both measurement axes. The silicon chip includes the driving and readout electronics, the excitation and pick-up coils made of the two CMOS process metallization layers. The ferromagnetic core is integrated from commercially available amorphous metal ribbons, by using a post-process compatible with standard IC technologies. Such a ferromagnetic core presents outstanding magnetic characteristics compared to usual electroplated cores. The micro-fluxgate works with a pulse shape driving current which allows the sensor output to be independent of the driving frequency. The current pulse width ratio of 1:8 reduces drastically the power consumption. For magnetic fields within ±60 μT, the micro-fluxgate sensor exhibits a magnetic sensitivity of 3760 V/T at 125 kHz with an amplification gain of 26.4 dB. The angle error on the Earth’s magnetic field is ±1.5°. The chip has a power consumption of 12.5 mW for a 20 mApeak driving current; its area is 5.3 mm2.

1999

Routing for Wireless Sensor Networks: From Collection to Event-Triggered Applications

Daniel Camilo Rojas Quirós

EPFL2018