Concept

Electrically-erasable programmable read-only memory

Publications associées (46)

A phase-change memory model for neuromorphic computing

Irem Boybat Kara, Evangelos Eleftheriou, Abu Sebastian

Phase-change memory (PCM) is an emerging non-volatile memory technology that is based on the reversible and rapid phase transition between the amorphous and crystalline phases of certain phase-change materials. The ability to alter the conductance levels i ...

AMER INST PHYSICS2018

Perspective on training fully connected networks with resistive memories: Device requirements for multiple conductances of varying significance

Giorgio Cristiano, Massimo Giordano

Novel Deep Neural Network (DNN) accelerators based on crossbar arrays of non-volatile memories (NVMs)-such as Phase-Change Memory or Resistive Memory-can implement multiply-accumulate operations in a highly parallelized fashion. In such systems, computatio ...

2018

Critical scattering and incommensurate phase transition in antiferroelectric PbZrO3 under pressure

Alexander Tagantsev

Antiferroelectric lead zirconate is the key ingredient in modern ferroelectric and piezoelectric functional solid solutions. By itself it offers opportunities in new-type non-volatile memory and energy storage applications. A highly useful and scientifical ...

Springer Nature2017

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

Elmira Shahrabi, Igor Krawczuk, Yusuf Leblebici, Jury Sandrini, Behnoush Attarimashalkoubeh

In this paper, we investigate different methods and approaches in order to improve the electrical characteristics of Pt/HfOx/TiN ReRAM devices. We discuss the improvement of the ReRAM electrical characteristics after the insertion of a Hf and Ti buffer lay ...

Ieee2016

Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Pascal Andreas Meinerzhagen

Logic compatible gain cell (GC) embedded DRAM (eDRAM) arrays are considered an alternative to SRAM due to their small size, non-ratioed operation, low static leakage, and 2-port functionality. However, traditional GC-eDRAM implementations require boosted c ...

Ieee-Inst Electrical Electronics Engineers Inc2016

Chip-Level CMOS Co-Integration of ReRAM-Based Non-Volatile Memories

Elmira Shahrabi, Yusuf Leblebici, Jury Sandrini, Tugba Demirci, Mahmoud Hadad, Behnoush Attarimashalkoubeh

This work reports a technique to fabricate ReRAM crossbar arrays co-integrated with fully finished 180 nm CMOS technology chips. The proposed integration method enables low- cost ReRAM-CMOS integration and allows the rapid prototyping of complete memory sy ...

Ieee2016

Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric

Mihai Adrian Ionescu, Ali Saeidi, Arnab Biswas

The implementation and operation of the nonvolatile ferroelectric memory (NVM) tunnel field effect transistors with silicon-doped HfO2 is proposed and theoretically examined for the first time, showing that ferroelectric nonvolatile tunnel field effect tra ...

2016

Energy vs. Reliability Trade-offs Exploration in Biomedical Ultra-Low Power Devices

David Atienza Alonso, Andreas Peter Burg, Pablo Garcia del Valle, Loris Gérard Duch, Shrikanth Ganapathy

State-of-the-art wearable devices such as embedded biomedical monitoring systems apply voltage scaling to lower as much as possible their energy consumption and achieve longer battery lifetimes. While embedded memories often rely on Error Correction Codes ...

Ieee2016

Charge-transport properties of monolayer MoS2 at the interface with dielectric materials

Simone Bertolazzi

Two-dimensional (2D) semiconductors, consisting of single-sheets of layered transition metal dichalcogenides (TMD), are attracting enormous interest from both fundamental science and technology. Monolayer molybdenum disulfide (MoS2), a typical example from ...

EPFL2015

Re-writing scheme for solid-state storage devices

Mohammad Amin Shokrollahi, Yuval Cassuto, Luoming Zhang

A multi-level cell flash memory storage device has cells wherein different charge levels represent different information. The storage device can read stored charge from one or more cells, store a rewrite generation value for a group of a plurality of cells ...

2014

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