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Mémoire à changement de phase

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Mémoire à changement de phase

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An MIG-based Compiler for Programmable Logic-in-Memory Architectures

Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: impact of conductance response

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric

Inversion optimization in majority-inverter graphs

“Edificio Traspirante”: Sistema d’Aria Condizionata Decentro Con Facciata Solare Integrate

Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element

Accurate Power Analysis for Near-Vt RRAM-based FPGA

Sort vs. Hash Join Revisited for Near-Memory Execution

Sort vs. Hash Join Revisited for Near-Memory Execution

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

An MIG-based Compiler for Programmable Logic-in-Memory Architectures

Inversion optimization in majority-inverter graphs

Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: impact of conductance response

Sort vs. Hash Join Revisited for Near-Memory Execution

“Edificio Traspirante”: Sistema d’Aria Condizionata Decentro Con Facciata Solare Integrate

Accurate Power Analysis for Near-Vt RRAM-based FPGA

Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric

Sort vs. Hash Join Revisited for Near-Memory Execution

Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element