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Distributed shared-memory (DSM) multi- processors provide a scalable hardware platform, but lack the necessary redundancy for mainframe-level reliability and availability. Chip-level redundancy in a DSM server faces a key challenge: the increased latency t ...
This paper presents a case study of different fault-tolerant architectures. The emphasis is on the silicon realization. A 128bit AES cryptographic core has been designed and fabricated as a main topology on which the fault-tolerant architectures have been ...
In this paper we show how to reduce downtime of J2EE applications by rapidly and automatically recovering from transient and intermittent software failures, without requiring application modifications. Our prototype combines three application-agnostic tech ...
Extensive sequencing in the HoxD complex of several vertebrate species has revealed a set of conserved DNA sequences interspersed between neighboring Hox genes. Their high degree of conservation strongly suggested that they are used for regulatory purposes ...
Fault-tolerant design methods for VLSI circuits, which have traditionally been addressed at system level, will not be adequate for future very-deep submicron CMOS devices where serious degradation of reliability is expected. Therefore, a new design approac ...
In off-line streaming, packet level erasure resilient forward error correction (FEC) codes rely on the unrestricted buffering time at the receiver. In real-time streaming, the extremely short playback buffering time makes FEC inefficient for protecting a s ...
This paper reports on a structural concept for engineering structures composed of FRP components to provide system ductility that compensates for the lack of material ductility inherent to FRP materials. The concept includes the use of redundant structural ...
