Électronique (technique)

Résumé

vignette|Composants de circuits électroniques. L'électronique est une branche de la physique appliquée, . Elle traite . On parle d'électronique surtout quand les circuits électriques comportent des éléments amplificateurs et notamment des semi-conducteurs. Le terme électrotechnique recouvre en principe l'ensemble des applications de l'électricité, mais en français, on en exclut les domaines des télécommunications et des technologies de l'information, que l'on considère ainsi du domaine exclusif de l'électronique. Les métiers de l'électronique se répartissent en domaines assez spécialisés, qui constituent chacun un domaine d'étude : électronique numérique, électronique de puissance Généralités L'électronique est une discipline technique ou science de l'ingénieur, l'une des branches les plus importantes de la physique appliquée, auxiliaire dans la plupart des industries. Le mot électronique, qui désigne d'abord les faits et théories relatifs à l'élec

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https://fr.wikipedia.org/wiki/%C3%89lectronique_(technique)

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Recent advancements in nanofabrication have enabled the creation of vacuum electronic devices with nanoscale free-space gaps. These nanoelectronic devices promise the benefits of cold-field emission and transport through free space, such as high nonlinearity and relative insensitivity to temperature and ionizing radiation, all while drastically reducing the footprint, increasing the operating bandwidth, and reducing the power consumption of each device. Furthermore, planarized vacuum nanoelectronics could easily be integrated at scale similar to typical microscale and nanoscale semiconductor electronics. However, the interplay between different electron emission mechanisms from these devices is not well understood, and inconsistencies with pure Fowler-Nordheim (FN) emission have been noted by others. In this work, we systematically study the current-voltage characteristics of planar vacuum nanodevices having few-nanometer radii of curvature and free-space gaps between the emitter and the collector. By investigating the current-voltage characteristics of nearly identical devices fabricated from two different materials and under various environmental conditions, such as temperature and atmospheric pressure, we are able to clearly isolate three distinct emission regimes within a single device: Schottky, FN, and saturation. Our work will enable robust and accurate modeling of vacuum nanoelectronics, which will be critical for future applications requiring high-speed and low-power electronics capable of operation in extreme conditions.

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

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In the last decade the power consumption of electronic devices has increased for both static and active components. Following the Dennard's scaling rule, as long as the transistor sizes are reduced then the supply voltage (VDD) can also be scaled in order to increase the area density and maintain or improve the performances. However, scaling VDD and thus shifting the threshold voltage (Vth) of 60mV in a metal-oxide semiconductor field-effect transistor (MOSFET) increases the OFF state current (Ioff ) by a factor of 10 in the ideal case. The reason for this is that the inverse subthreshold slope (SS) in an ideal MOSFET is limited by the thermionic emission of electrons over a potential barrier, which has an intrinsic physical limit of 60mV/decade. To overcome this limit, novel device concepts have been proposed and the tunnel field-effect transistor (TFET) is one of the most promising because it resembles a MOSFET and should enable to achieve sub-60mV/dec SS, low Ioff and small VDD. The aim of this thesis is to investigate the potential of TFETs by the fabrication and characterization of InAs/Si as p-channel and InAs/GaSb as n-channel device for a complementary TFET technology. III-V nanowires are grown via metal-organic chemical vapor deposition (MOCVD) and are integrated on Si(100) substrates using a novel technique called template-assisted selective epitaxy (TASE), which enables the fabrication of vertical and lateral III-V hetero-structure TFETs. Sub-40nm nanowire cross-section InAs/Si p-TFETs and InAs/GaSb n-TFETs in-plane on Si are demonstrated for the first time. The InAs/Si p-TFETs exhibit state-of-the art performances with an ON state current (Ion) of 4uA/um at VGS=VDS=-0.5V, ON/OFF ratio of 1x10E5 with SSavg of 70-80mV/dec at room temperature. The InAs/GaSb n-TFETs have an order of magnitude larger Ion but the SS is limited by the non-optimized gate-stack on InAs channel and by the depletion of the undoped GaSb source. Different operation regimes of TFETs are investigated by temperature-dependent measurements,Wentzel-Kramers-Brillouin (WKB) modeling and TCAD simulations, indicating that the switching region for InAs/Si is dominated by the presence of traps at the hetero-junction. The abruptness of the band-edges in InAs/GaSb is studied by the extraction of the conductance slope in fabricated p-n and p-i-n tunnel diodes.

EPFL2016

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Because the market has an insatiable appetite for new functionality, performance is becoming an increasingly important factor. The telecommunication and network domains are especially touched by this phenomenon but they are not the only ones. For instance, the automotive applications are also affected by the passion around the electronic devices that are programmable. This thesis work will focus on embedded applications based on programmable processing unit. Indeed, nowadays, for time to market reasons, re-use and flexibility are important parameters. Consequently, embedded processors seem to be the solution because the behavior of the circuit can be modified by software what does not cost a lot compared to Application Specific Integrated Circuits (ASICs) or Digital Signal Processors (DSPs) where hardware modifications are necessary. This choice is judicious compared to multi-pipeline processors like superscalar or Very Long Instruction Word (VLIW) architectures or even in comparison to a Field Programmable Gate Array (FPGA) which require more silicon area, consume more energy and are not as robust as simple scalar processors. Nevertheless, commercial scalar processors, dedicated to embedded systems, have poor frequencies which has a negative effect on their performance. This phenomenon is even more visible with deep-submicron technologies where the primary memories and wire delays do not scale as fast as the logic. Furthermore, the memory speed decreases when their capacity of storage increases and depends on both their organization (associativity, word size, etc.) and the IPs of the foundry. Likewise, synthesizable IP memories have a greater access time than their hard macrocell counterparts. This thesis work proposes a new synthesizable architecture for scalar embedded processors dedicated to alleviate the drawbacks previously mentioned and called Memory Wall : so, its goal is to push back the limits of frequency without introducing wasted cycles used to solve data and control dependencies, independently of the foundry. The architecture that came out, called Deep Submicron RISC (DSR), is made up of a single pipeline with eight stages that executes the instructions in order. In addition to tackle the memory access time and to alleviate the delays of wires, it is appropriate to minimize the power consumption. The proposed architecture is compared to two MIPS architectures, the MIPS R3000 and the MIPS32 24k in order to be able to analyze the performance of the architectures themselves, independently of both Instruction Set (ISA) MIPS 1 and compiler. The R3000 is a processor born in the 90's and the 24k came out in 2004. Obviously, the study reveals that the five-stage processor remains efficient – especially in comparison to the MIPS24k – when the critical path passes by the core and not by the primary memories. Even if the MIPS24k tackles in part the Memory Wall, DSR is much more efficient and reach a gain of efficiency – defined as performance/surface – of 72% thanks to its High-density version (DSR-HD) compared to a five-stage processor. DSR is even more efficient than the two MIPS processors when the transistor channel length decreases, the wire delays are important or the memories are large and their organization complex.

EPFL2007

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EPFL2016

EPFL2007