Publications de Yüksel Temiz | EPFL Graph Search

Post-cmos processing and 3d integration based on dry-film lithography

Carlotta Guiducci, Yusuf Leblebici, Yüksel Temiz

A method for performing a post processing pattern on a diced chip having a foot-print, comprises the steps of providing a support wafer; applying a first dry film photoresist to the support wafer; positioning a mask corresponding to the footprint of the di ...

2015

Design and characterization of micromachined sensor array integrated with CMOS based optical readout

Yusuf Leblebici, Yüksel Temiz, Ulas Adiyan, Refik Burak Erarslan

This paper reports a micro electro-mechanical system (MEMS) based sensor array integrated with CMOS-based optical readout. The integrated architecture has several unique features. MEMS devices are passive and there are no electrical connections to the MEMS ...

Elsevier2014

A 0.18 mu m Biosensor Front-End Based on 1/f Noise, Distortion Cancelation and Chopper Stabilization Techniques

Christian Enz, Carlotta Guiducci, Yüksel Temiz, Anna Ferretti

This paper presents a novel sensor front-end circuit that addresses the issues of 1/f noise and distortion in a unique way by using canceling techniques. The proposed front-end is a fully differential transimpedance amplifier (TIA) targeted for current mod ...

Ieee-Inst Electrical Electronics Engineers Inc2013

Post-CMOS Processing and 3-D Integration Based on Dry-Film Lithography

Carlotta Guiducci, Yusuf Leblebici, Yüksel Temiz

This paper presents a chip-level postcomplementary metal oxide semiconductor (CMOS) processing technique for 3-D integration and through-silicon-via (TSV) fabrication. The proposed technique is based on dry-film lithography, which is a low-cost and simple ...

Ieee-Inst Electrical Electronics Engineers Inc2013

3D Integration Technology for Lab-on-a-Chip Applications

Yüksel Temiz

This study adds a new dimension to lab-on-a-chip systems by employing three-dimensional (3D) integration technology for improved performance, higher functionality, and on-chip computational power. Despite the extensive amount of current research on 3D memo ...

EPFL2012

Resistive Programmable Through Silicon Vias for Reconfigurable 3D Fabrics

Giovanni De Micheli, Davide Sacchetto, Michail Zervas, Yusuf Leblebici, Yüksel Temiz

In this letter we report on the fabrication and characterization of titanium dioxide (TiO2)-based resistive RAM (ReRAM) co-integration with 380 ìm-height Cu Through Silicon Via (TSV) arrays for programmable 3D interconnects. Nonvolatile resistive switching ...

Institute of Electrical and Electronics Engineers2012

A Comparative Study on Fabrication Techniques for On-Chip Microelectrodes

Carlotta Guiducci, Yusuf Leblebici, Yüksel Temiz, Anna Ferretti

This paper presents an experimental study on different microelectrode fabrication techniques, with particular focus on the robustness of the surface insulation towards typical working conditions required in lab-on-a-chip applications. Pt microelectrodes wi ...

Royal Society of Chemistry2012

Design and Testing Strategies for Modular 3-D-Multiprocessor Systems Using Die-Level Through Silicon Via Technology

Michail Zervas, Yusuf Leblebici, Alessandro Cevrero, Yüksel Temiz, Giulia Beanato, Panagiotis Athanasopoulos, Paolo Giovannini

An innovative modular 3-D stacked multi-processor architecture is presented. The platform is composed of completely identical stacked dies connected together by through-silicon-vias (TSVs). Each die features four 32-bit embedded processors and associated m ...

2012

A CMOS Compatible Chip-to-Chip 3D Integration Platform

Carlotta Guiducci, Michail Zervas, Yusuf Leblebici, Yüksel Temiz

In this paper, a CMOS-compatible chip-to-chip 3D integration platform will be presented. The developed technology allows reconstituting a wafer from diced and thinned chips. Then, chip-to-chip bonding and TSV fabrication steps are accomplished in wafer-lev ...

IEEE2012

Fabrication and characterization of wafer-level deep TSV arrays

Michail Zervas, Yusuf Leblebici, Yüksel Temiz

Three Dimensional (3D) integration, based on through silicon vias (TSV), has the potential to become a key enabling technology for many applications. TSVs are commonly categorized according to their aspect ratio and diameter. An equally important parameter ...

IEEE2012