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The advent of single-photon detectors known as Single-Photon Avalanche Diodes in standard CMOS technology opened the way to new perspectives in integrating these ultra sensitive light sensors with digital logic. Light has some interesting properties that a ...
The paper presents a new initialization mechanism based on a Convex Combination Method (CCM) for Kohonen self-organizing Neural Networks (NNs) realized in the CMOS technology. A proper selection of initial values of the neuron weights exhibits a strong imp ...
Since the first introduction of digital cameras, the camera market has been taking tremendous interest from many fields. This trend has even accelerated when the cost, size, and power consumption of such devices were reduced with the introduction of camera ...
Random telegraph signal (RTS) behavior is reported and characterized in the dark count rate of single-photon avalanche Diodes (SPADs). The RTS is observed in a SPAD fabricated in 0.8-mu m CMOS technology and in four proton-irradiated SPADs designed and fab ...
Institute of Electrical and Electronics Engineers2010
Subthreshold source-coupled logic (STSCL) circuits can be used in design of low-voltage and ultra-low power digital systems. This article introduces and analyzes new techniques for implementing complex digital systems using STSCL gates with an improved pow ...
The key factor in widespread adoption of Radio Frequency Identification (RFID) technology is tag cost minimization. This paper presents the first low-cost, ultra-low power, passive RFID tag, fully integrated on a single substrate in a standard CMOS process ...
Institute of Electrical and Electronics Engineers2014
This paper explores a new way to reduce the readout noise for CMOS image sensors by using a typical 4T pixel embedding a PMOS source follower with reduced oxide thickness and gate dimensions. This approach is confirmed by a test chip designed in a 180 nm C ...
We present a new programmable neighborhood mechanism for hardware implemented Kohonen self-organizing maps (SOMs) with three different map topologies realized on a single chip. The proposed circuit comes as a fully parallel and asynchronous architecture. T ...
Institute of Electrical and Electronics Engineers2011
We present a fully integrated CMOS receiver for micro-magnetic resonance imaging together with a custom-made micro-gradient system. The receiver is designed for an operating frequency of 300 MHz. The chip consists of an on-chip detection coil and tuning ca ...
New advances in the field of image sensors (especially in CMOS technology) tend to question the conventional methods used to acquire the image. Compressive Sensing (CS) plays a major role in this, especially to unclog the Analog to Digital Converters which ...