Spice Simulation of Passive Protection in Smart Power ICs
Graph Chatbot
Chattez avec Graph Search
Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.
AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.
Side-channel CPU disassembly is a side-channel attack that allows an adversary to recover instructions executed by a processor. Not only does such an attack compromise code confidentiality, it can also reveal critical information on the system’s internals. ...
The growth of information technology has been sustained by the miniaturization of Complementary Metal-Oxide-Semiconductor (CMOS) Field-Effect Transistors (FETs), with the number of devices per unit area constantly increasing, as exemplified by Mooreâs la ...
Routing multiplexers based on pass-transistors or transmission gates are an essential components in many digital integrated circuits. However, whatever structure is employed, CMOS multiplexers have two major limitations: 1) their delay is linearly related ...
Field Programmable Gate Arrays (FPGAs) have been indispensable components of embedded systems and datacenter infrastructures. However, energy efficiency of FPGAs has become a hard barrier preventing their expansion to more application contexts, due to two ...
A 3-D simulation of substrate currents is crucial to analyze parasitic coupling effects due to minority carrier injection in smart power ICs. In this paper, a substrate parasitic extraction methodology is introduced by dividing the IC layout into elementar ...
One of the key elements to improve mainstream crystalline silicon (c-Si) solar cell performance is surface passivation, which is at the center of the ongoing transition from cells with direct silicon-metal contacts to full area passivating contacts. In the ...
Ultralow-power sensing with inference functionality embedded in sensor nodes is essential for enabling the emerging pervasive intelligence. For acoustic inference sensing, the feature extraction can take advantage of power-efficient analog circuits. Howeve ...
In recent years, the major focus of VLSI design has shifted from high-speed to low-power consumption. While standard CMOS-based digital design provides substantial flexibility during pre-silicon design phases, the characteristics of the gates are set by fa ...
In this paper, the degradation mechanisms of the ceramic and the metal in Titanium/Zirconia pairs for biomedical applications were analyzed. To do that, an experimental set-up with well-controlled mechanical and chemical conditions was used based on a unid ...
The broad application of NoCs in IC design has been enabled by NoC synthesis tools that evolved from university prototypes to full commercial synthesis flows. NoC embodiments are ubiquitously present in circuits and systems. As systems evolve to include ne ...