Low-Noise, High-Density Microelectronics for Multi-Mode Screening of Excitable Biological Cells

In the past decades, two recording tools have established themselves as the working horses in the field of electrophysiological cell research: the microelectrode array (MEA) and the optical fluorescence imaging. The former is a grid of miniature electrodes allowing to monitor and stimulate cell networks; the latter uses voltage-sensitive dyes (VSDs) rendering the membrane potential visible. So far, researchers trying to combine these two measurement methods face complex electro-optical setups that suffer from the limitations of both techniques. On this ground, it is highly desirable to have a new tool at hand that (a) implements both measurement methods in a single device, (b) offers a high spatio-temporal resolution for both the electrical and the optical sensors, (c) is compact, (d) is easy to handle, and (e) allows long-term measurements. The project, this work is part of, aims to achieve these goals by means of a new concept: the multi-mode sensor array (MMSA). It consists of two parts: (1) a quartz-based microfabricated biointerface housing the sensing devices, i.e. platinum electrodes and amorphous silicon photodiodes; (2) an application specific integrated circuit (ASIC) for the amplification and the conditioning of the detected signals. The two devices are flip-chip bonded together by high-density indium bumps. The resulting measurement tool features a sensor array containing 1024 electrodes and 3072 photodiodes at a pitch of 60 μm and 30 μm, respectively. The main objective of this work is the development of said ASIC with the main task being the design of low-noise, high-density electronic circuits to read the signals detected by the biointerface electrodes and photodiodes. Secondary goals are the packaging of the system and the development of a data acquisition platform to visualise and analyse the measured values. In the course of this dissertation, two ASIC versions were designed: the MMSA I and MMSAII chips. With regard to the electrode low-noise amplifier (LNA), the two versions exhibit substantially different architectures. The MMSAI LNA features a fully-differential architecture, two amplification stages with selectable gain iii Abstract (60/50 dB) and a stable bandwidth of 10 kHz, and two integrated offset compensation techniques. While the measured gain and bandwidth are in good agreement with the simulations, the noise is substantially higher than anticipated since flicker noise was not taken into account in the circuit analysis. Based on the experiences from the MMSA I chip, the second ASIC was developed with a single-ended architecture with a folded-cascode amplifier at its core. It exhibits a gain of 52 dB, a bandwidth of 52 kHz, an average noise of 26 μVrms, and a power consumption of less than 85 μW. The offset compensation allows to deal with input-referred offset in a total range of 40 mV. Furthermore, each pixel was equipped with a sample & hold buffer and a programmable stimulation circuitry. The former stores the amp