GaN vertical power devices on silicon substrates

Gallium Nitride (GaN) is a wonder material which has widely transformed the world by enabling energy-efficient white light-emitting diodes. Over the past decade, GaN has also emerged as one of the most promising materials for developing power devices which can operate at significantly higher power densities, higher temperatures, and higher frequencies, thanks to inherently superior material properties like higher bandgap, 10x higher critical electric field, and 3x higher electron saturation velocity, compared to silicon. Lateral GaN high electron mobility transistors (HEMTs) based on the AlGaN/GaN heterostructures capable of switching at high frequencies over 10 MHz have been already commercialized and are the device of choice for implementing modern-day adapters and for wireless charging solutions. However, for high-voltage and high-current applications, it is envisaged that vertical GaN power devices will play a crucial role given that these devices dont scale in size for increasing the BV unlike HEMTs, and are not affected by surface trap related reliability issues. The main bottleneck towards the commercialization of vertical GaN devices on bulk GaN substrates is the high cost and small size availability of these substrates. Similar to lateral GaN HEMTs, GaN epitaxial layers grown on silicon substrate could also become a game-changer for vertical GaN power devices considering that silicon substrates are significantly cheaper and are available in large sizes up to 12-inch diameters which can greatly accelerate viable commercialization. However, there are several roadblocks arising from the growth as well as fabrication perspective that has limited the demonstration of high-performance power devices on GaN-on-Si. In this thesis, we discuss the key hindrances and our solutions for improving the feasibility of GaN-on-Si vertical power devices. All the necessary fabrication steps were first optimized from scratch to develop state-of-the-art power devices. As a first demonstration, we could develop a GaN p-i-n diode with an ultra-low Ron,sp of 0.33 mohmcm2 and record BV of 820 V with a voltage blocking GaN layer of just 4 um. A quasi-vertical MOSFET was then demonstrated for the first time on GaN-on-Si platform with excellent ON- and OFF-state performances. We then probed the limits of current crowding, a main deterrent to the current up-scaling of quasi-vertical devices by exploring large area quasi-vertical MOSFETs. A novel and robust method for achieving a fully-vertical design for GaN-on-Si devices was developed which led to an exemplary improvement in the ON-state performance of quasi-vertical MOSFETs. Device integration has been identified by many leading power semiconductor companies as the way forward due to significant advantages to be had, as a result of lower parasitics and simplified packaging. Taking a cue from these developments, we demonstrated vertical GaN power MOSFETs with integrated freewheeling diodes and reverse blocking capability as described in Chapter 4. In the last chapter, we introduce p-type NiO as a possible substitute for p-GaN for realizing high-performance p-i-n diodes and as junction termination extensions (JTEs) for Schottky barrier diodes. Our initial results point to a strong future for p-NiO to be used for realizing a myriad of reliable GaN power devices.