Publications associées à Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip

Thermo-optic epsilon-near-zero effects

Camille Sophie Brès, Jiaye Wu, Marco Clementi, Qian Li

Nonlinear epsilon-near-zero (ENZ) nanodevices featuring vanishing permittivity and CMOS-compatibility are attractive solutions for large-scale-integrated systems-on-chips. Such confined systems with unavoidable heat generation impose critical challenges fo ...

Nature Portfolio2024

Eco-Conscious Approach to Wireless Gas Monitoring With a Hybrid Printed Passive Sensor Tag

Sandro Carrara, Johanna Zikulnig, Jürgen Kosel

Addressing the environmental impact of electronic waste in biomedical sensing, an eco-conscious approach to the realization of a Chitosan-based Acetone sensor tag for wireless gas monitoring is presented. The fabrication involves inkjet printing of silver ...

Ieee-Inst Electrical Electronics Engineers Inc2024

A modular multiple frequency inductive link to wirelessly power multiple miniaturized implants

Sandro Carrara, Diego Ghezzi, Gian Luca Barbruni

A modular multiple frequency coils inductive link system to wirelessly provide power for at least a medical implant at an output of a receiving coil, whereby the receiving coil is configured to be implanted in an organism. The modular multiple frequency co ...

2024

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Adam Shmuel Teman, Robert Giterman

Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

MDPI2024

Towards Scalable Electronics: Synthetic 2D Materials for Large-Area 2D Circuit Integration

Zhenyu Wang

In the past decades, a significant increase of the transistor density on a chip has led to exponential growth in computational power driven by Moore's law. To overcome the bottleneck of traditional von-Neumann architecture in computational efficiency, effo ...

EPFL2024

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Siang-Yun Lee

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

EPFL2024

Highly Parallel RTL Simulation

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

EPFL2024

Graph generative deep learning models with an application to circuit topologies

Igor Krawczuk

Modern integrated circuits are tiny yet incredibly complex technological artifacts, composed of millions and billions of individual structures working in unison. Managing their complexity and facilitating their design drove part of the co-evolution of mode ...

EPFL2024

Advanced Silicon and SWIR Single-Photon Avalanche Diodes: Design, Simulation, and Characterization

Ekin Kizilkan

Low-level light detection with high spatial and timing accuracy is a growing area of interest by virtue of applications such as light detection and ranging (LiDAR), biomedical imaging, time-resolved Raman spectroscopy, and quantum applications. Single-phot ...

EPFL2024

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

2024