Publication

Low-Power Adaptive Bias/Clock Generator Using 0.18um CMOS Technology for Multi-Core Continuous Voltage and Frequency Scaling

Publications associées (79)

À propos
Confidentialité
Mentions légales

Graph Chatbot

Chattez avec Graph Search

Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.

AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.

Connectez-vous pour utiliser Chat avec Graph Search

Low-Power Adaptive Bias/Clock Generator Using 0.18um CMOS Technology for Multi-Core Continuous Voltage and Frequency Scaling

Graph Chatbot

Chattez avec Graph Search

Statistical Fault Injection for Impact-Evaluation of Timing Errors on Application Performance

Statistical Fault Injection for Impact-Evaluation of Timing Errors on Application Performance

Jitter Analysis and Measurement in Subthreshold Source-Coupled Differential Ring Oscillators

Near/Sub-Threshold Circuits and Approximate Computing: The Perfect Combination for Ultra-Low-Power Systems

Design of ultra low-power RF oscillators based on the inversion coefficient methodology using BSIM6 model

Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment

Memristive Biosensors Under Varying Humidity Conditions

Synchronization of nanomechanical oscillators

Offset Compensation Based on Distributed Hall Cell Architecture

Offset Compensation Based on Distributed Hall Cell Architecture

Offset Compensation Based on Distributed Hall Cell Architecture

Synchronization of nanomechanical oscillators

Jitter Analysis and Measurement in Subthreshold Source-Coupled Differential Ring Oscillators

Statistical Fault Injection for Impact-Evaluation of Timing Errors on Application Performance

Near/Sub-Threshold Circuits and Approximate Computing: The Perfect Combination for Ultra-Low-Power Systems

Offset Compensation Based on Distributed Hall Cell Architecture

Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment

Statistical Fault Injection for Impact-Evaluation of Timing Errors on Application Performance

Memristive Biosensors Under Varying Humidity Conditions

Design of ultra low-power RF oscillators based on the inversion coefficient methodology using BSIM6 model