Lecture
This lecture covers the fundamentals of VLSI design, focusing on the RTL (Semi-Custom) design flow, the differences between full-custom and semi-custom design, and the anatomy of complex SoCs. It also delves into chip-level integration strategies, standard cells, and the design flow for semi-custom ASICs. The lecture explains the RTL design flow, chip-level integration, and the importance of static timing analysis in digital circuit design. It concludes with insights into the automatic characterization of standard cells and the use of LEF files for library exchange and cell characterization.