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This paper explores a new way to reduce the readout noise for CMOS image sensors by using a typical 4T pixel embedding a PMOS source follower with reduced oxide thickness and gate dimensions. This approach is confirmed by a test chip designed in a 180 nm CIS CMOS process, and embedding small arrays of the proposed new pixels together with state-of-the-art 4T pixels for comparison. The new pixels feature a pitch of 7.5 µm and a fill factor of 66%. A 0.4 erms input-referred noise and a 185 µV/e- conversion gain are obtained. Compared to stateof-the-art pixels, also present onto the test chip, the RMS noise is divided by more than 2 and the conversion gain is multiplied by 2.2.
Jan Wienold, Stephen William Wasilewski
Edoardo Charbon, Claudio Bruschini, Andrei Ardelean, Paul Mos, Arin Can Ülkü, Michael Alan Wayne
Varun Sharma, Konstantin Androsov, Xin Chen, Rakesh Chawla, Werner Lustermann, Andromachi Tsirou, Alexis Kalogeropoulos, Andrea Rizzi, Thomas Muller, David Vannerom, Albert Perez, Alessandro Caratelli, François Robert, Davide Ceresa, Yong Yang, Ajay Kumar, Ashish Sharma, Georgios Anagnostou, Kai Yi, Jing Li, Stefano Michelis, David Parker, Martin Fuchs