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Power-Hardware-in-the-Loop (PHIL) setups have gained high importance in validation of the performance of newly developed instruments and devices with low risk and implementation cost. However, the interconnection of a power hardware with a simulated model via a feedback loop using measured signals may make the closed-loop system unstable. In this paper, a systematic method is proposed to design a digital filter such that the closed-loop stability of the PHIL setup is guaranteed and its performance is optimized. The design of the filter is formulated as a specific controller synthesis problem that minimizes the deviation in measured feedback current and ensures a certain robustness margin. The design problem is written as a convex optimization and solved efficiently using available solvers. Due to the data-driven characteristic of the proposed method, there is no need for the model of the Hardware Under the Test (HUT) to guarantee stability and performance. Since the design is done in a systematic fashion using advanced control design techniques with a rigorous mathematical guarantee for stability, a high-performance filter can be designed with no need for laborious manual tuning that may lead to low-performance filters. This method is also extended to a multi-scenario case including different combinations of hardware and simulated systems. The PHIL experimental results validate the effectiveness of the proposed method while satisfying the required stability margin and improving the performance significantly compared to conventional filters.
Drazen Dujic, Andrea Cervone, Tianyu Wei
Mahsa Shoaran, Uisub Shin, Bingzhao Zhu
Alireza Karimi, Elias Sebastian Klauser