Publications related to Failure of electronic components

Analysis of degradation mechanisms in lattice-matched InAlN/GaN high-electron-mobility transistors

Nicolas Grandjean, Jean-François Carlin, Eric Feltin, Marcus Gonschorek

We address degradation aspects of lattice-matched unpassivated InAlN/GaN high-electron-mobility transistors (HEMTs). Stress conditions include an off-state stress, a semi-on stress (with a partially opened channel), and a negative gate bias stress (with so ...

2009

Influence of Information Leakage in Analog Memory on Learning Kohonen Network on Silicon

Rafal Tomasz Dlugosz

The paper presents an influence of leakage effect observed in capacitive analog memories on learning process in hardware implemented Kohonen neural networks with MOS transistors used as switches connected with information holding capacitors. The learning r ...

Ieee Service Center2009

Highly Reliable Carbon Nanotube Transistors with Patterned Gates and Molecular Gate Dielectric

Klaus Kern, Hagen Klauk, Marko Burghard, Ralf Thomas Weitz

The prospect of realizing nanoscale transistors using individual semiconducting carbon nanotubes offers enormous potential, both as an alternative to silicon technology beyond conventional scaling limits and as a way to implement high-speed devices and cir ...

2009

Subthreshold Source-Coupled Logic Circuits for Ultra Low Power Applications

Seyed Armin Tajalli, Eric Vittoz, Yusuf Leblebici

This article presents a novel approach for implementing ultra-low power digital components and systems using source-coupled logic (SCL) circuit topology, operating in weak inversion (sub-threshold) regime. PMOS transistors with shorted drain-substrate cont ...

2008

On performance of series connected CMOS vertical hall devices

Radivoje Popovic, Mirjana Banjevic

Series connected (stacked) CMOS vertical Hall devices were analyzed on the basis of performance of a single five contacts device biased at different common mode voltages with respect to the substrate. The uneven influence of junction field effect on residu ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2008

Hysteretic inverter-on-a-body-tied-wire based on less-than-10mV/decade abrupt punch-through impact ionization MOS (PIMOS) switch

Mihai Adrian Ionescu, Didier Bouvet, Kirsten Emilie Moselund, Vincent Pott

This work reports for the first time on a cascadable NMOS inverter based on punch-through impact ionization MOSFET (PIMOS) integrated on a single body-tied silicon wire. The PIMOS device acts as a single-transistor-latch and shows abrupt current switching ...

2008

Impact of Lateral Nonuniform Doping and Hot Carrier Injection on Capacitance Behavior of High Voltage MOSFETs

Mihai Adrian Ionescu, Michel Declercq, Yogesh Singh Chauhan

A detailed analysis of capacitance behavior of high-voltage MOSFET (HV-MOS), for example, LDMOS, using device simulation is made. The impact of lateral nonuniform doping and drift region are separately analyzed. It is shown that the peaks in C-GD and C-GS ...

2008

Impact of lateral non-uniform doping and hot carrier degradation on capacitance behavior of high voltage MOSFETs

Mihai Adrian Ionescu, Michel Declercq, Yogesh Singh Chauhan

In this work, a detailed analysis of capacitance behavior of high voltage MOSFET (HV-MOS) e.g. LDMOS, VDMOS using device simulation is made. The impact of lateral non-uniform doping and drift region is separately analyzed. It is shown that the peaks in C-G ...

Ieee Service Center2008

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Failure of electronic components

Analysis of degradation mechanisms in lattice-matched InAlN/GaN high-electron-mobility transistors

Influence of Information Leakage in Analog Memory on Learning Kohonen Network on Silicon

Highly Reliable Carbon Nanotube Transistors with Patterned Gates and Molecular Gate Dielectric

Use of self-actuating and self-sensing cantilevers for imaging biological samples in fluid

Subthreshold Source-Coupled Logic Circuits for Ultra Low Power Applications

Electrical properties of La2O3 and HfO2/La2O3 gate dielectrics for germanium metal-oxide-semiconductor devices

On performance of series connected CMOS vertical hall devices

Hysteretic inverter-on-a-body-tied-wire based on less-than-10mV/decade abrupt punch-through impact ionization MOS (PIMOS) switch

Impact of Lateral Nonuniform Doping and Hot Carrier Injection on Capacitance Behavior of High Voltage MOSFETs

Impact of lateral non-uniform doping and hot carrier degradation on capacitance behavior of high voltage MOSFETs

Graph Chatbot

Chat with Graph Search

Impact of lateral non-uniform doping and hot carrier degradation on capacitance behavior of high voltage MOSFETs

Impact of Lateral Nonuniform Doping and Hot Carrier Injection on Capacitance Behavior of High Voltage MOSFETs

Influence of Information Leakage in Analog Memory on Learning Kohonen Network on Silicon

Electrical properties of La2O3 and HfO2/La2O3 gate dielectrics for germanium metal-oxide-semiconductor devices

On performance of series connected CMOS vertical hall devices

Subthreshold Source-Coupled Logic Circuits for Ultra Low Power Applications

Hysteretic inverter-on-a-body-tied-wire based on less-than-10mV/decade abrupt punch-through impact ionization MOS (PIMOS) switch

Analysis of degradation mechanisms in lattice-matched InAlN/GaN high-electron-mobility transistors

Highly Reliable Carbon Nanotube Transistors with Patterned Gates and Molecular Gate Dielectric

Use of self-actuating and self-sensing cantilevers for imaging biological samples in fluid