Concept

Diode–transistor logic

Related publications (53)

Energy Efficient Sensing using Steep Slope Devices

Today, we are witnessing the Internet of Things (IoT) revolution, which facilitates and improves ourlives in many aspects, but comes with several challenges related to the technology deployment atlarge scales. Handling ever growing amounts of information t ...

EPFL2022

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Mirjana Stojilovic, Hossein Asadi, Zeinab Seifoori

Despite FPGAs rapidly evolving to support the requirements of the most demanding emerging applications, their high static power consumption, concentrated within the routing resources, still presents a major hurdle for low-power applications. Augmenting the ...

2021

An Analog-Assisted Digital LDO With Single Subthreshold Output pMOS Achieving 1.44-fs FOM

Kyojin Choo, Li Xu

This letter describes an analog-assisted digital LDO that cascades a conventional digital LDO structure with a single, large output pMOS biased in subthreshold to enable fast response to output voltage droop. By digitally controlling the gate voltage of th ...

IEEE2021

A Cryogenic Broadband Sub-1-dB NF CMOS Low Noise Amplifier for Quantum Applications

Edoardo Charbon, Andrea Ruffino, Yatao Peng

A cryogenic broadband low noise amplifier (LNA) for quantum applications based on a standard 40-nm CMOS technology is reported. The LNA specifications are derived from the readout of semiconductor quantum bits at 4.2 K, whose quantum information signals ar ...

2021

Performance of GaN Power Devices for Cryogenic Applications Down to 4.2 K

Elison de Nazareth Matioli, Luca Nela, Palliyage Srilak Nirmana Perera, Catherine Erine

Gallium nitride (GaN) power devices are employed in an increasing number of applications thanks to their excellent performance. Nevertheless, their potential for cryogenic applications, such as space, aviation, and superconducting systems, has not yet been ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Active-Device Losses in Resonant Power Converters: A Case Study with Class-E Inverters

Elison de Nazareth Matioli, Remco Franciscus Peter van Erp, Armin Jafari, Palliyage Srilak Nirmana Perera, Jessy Anthony Ançay

Recent research has reported an undesirable OFF-state loss in high-frequency soft-switching power converters, such as resonant converters. This loss is attributed to a hysteresis loss related to the charging-discharging process of the output capacitance of ...

IEEE2021

Comparison of Different Precision Pseudo Resistor Realizations in the DC-Feedback of Capacitive Transimpedance Amplifiers

Georg Fantner, Jens Anders

In this paper, three different pseudo resistor (PR) realizations are compared regarding their noise and linearity performance within the DC feedback loop of an integrator-differentiator transimpedance amplifier (I-D-TIA). Thanks to its intrinsic shot noise ...

IEEE2019

Design techniques for a stable operation of cryogenic field-programmable gate arrays

Edoardo Charbon, Harald Arjan Robert Homulle

In this paper, we show how a deep-submicron field-programmable gate array (FPGA) can be operated more stably at extremely low temperatures through special firmware design techniques. Stability at low temperatures is limited through long power supply wires ...

2018

Variability of Low Frequency Noise and mismatch in enclosed-gate and standard nMOSFETs

Matthias Bucher, Mathieu Yves Hervé Coustans

Variability of Low Frequency Noise (LFN) and Random Telegraph Noise (RTN) is an important concern for many analog CMOS integrated circuits. In this paper, transistors with enclosed gate layout are examined and compared with standard layout transistors, wit ...

IEEE2017

Multi-level Logic Benchmarks: An Exactness Study

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Eleonora Testa, Winston Jason Haaswijk

In this paper, we study exact multi-level logic benchmarks. We refer to an exact logic benchmark, or exact benchmark in short, as the optimal implementation of a given Boolean function, in terms of minimum number of logic levels and/or nodes. Exact benchma ...

Ieee2017

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