Test of VLSI Systems: ATPG and Fault Coverage

This lecture covers the generation of test vector patterns for VLSI systems, focusing on combinational and sequential ATPG algorithms. It explains the computational burden of functionally and structurally testing circuits, the concept of ATPG, search space abstractions, and Roth's 5-valued algebra. The path sensitization method is detailed, illustrating how faults are activated, propagated, and justified. Examples demonstrate the application of path sensitization in identifying faults and generating test vectors. The lecture concludes with the D-algorithm, essential prime implicants, and the propagation of fault effects through gates.