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Yusuf Leblebici

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Yusuf Leblebici

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A Bio-Inspired Reconfigurable Architecture for Local Binary Descriptors

Neuromorphic Computing Using Non-Volatile Memory

Review of Advances in Neural Networks: Neural Design Technology Stack

Co-design of ReRAM Passive Crossbar Arrays Integrated in 180nm CMOS Technology

Impact of Data Serialization over TSVs on Routing Congestion in 3D-Stacked Multi-Core Processors

Effect of Hf Metal Layer on the Switching Characteristic of HfOX-based Resistive Random Access Memory

A Chip-Level Post-CMOS Via-Last Cu TSV Process for Multi-Layer Homogeneous 3D Integration

Design and Analysis of Jitter-Aware Low-Power and High-Speed TSV Links for 3D ICs

A 4×9 Gb/s 1 pJ/b Hybrid NRZ/Multi-Tone I/O with Crosstalk and ISI Reduction for Dense Interconnects

A Fully-Digital Spectrum Shaping Signaling for Serial-Data Transceiver with Crosstalk and ISI Reduction Property in Multi-Drop Memory Interfaces