Person

Vasileios Pavlidis

This person is no longer with EPFL

Related publications (21)

Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits

Giovanni De Micheli, Vasileios Pavlidis, Somayyeh Rahimian Omam

Designing a low power clock network in synchronous circuits is an important task. This requirement is stricter for 3-D circuits due to the increased power densities. Resonant clock networks are considered efficient low-power alternatives to conventional cl ...

Springer-Verlag2011

Analytical Heat Transfer Model for Thermal Through-Silicon Vias

Giovanni De Micheli, Hu Xu, Vasileios Pavlidis

Thermal issues are one of the primary challenges in 3-D integrated circuits. Thermal through-silicon vias (TTSVs) are considered an effective means to reduce the temperature of 3-D ICs. The effect of the physical and technological parameters of TTSVs on th ...

2011

Design Methods and Tools for 3D Integration

Giovanni De Micheli, David Atienza Alonso, Yusuf Leblebici, Vasileios Pavlidis

The design of 3-dimensional integrated circuits requires new specialized tools, methods and flows. Whereas some tools are on the market and some design flows for standard ICs are extended to handle die stacking and through-silicon vias, much R&D has still ...

2011

Clock Distribution Networks in 3-D Integrated Systems

Vasileios Pavlidis

3-D integration is an important technology that addresses fundamental limitations in on-chip interconnects. Several design issues related to 3-D circuits, such as multiplane synchronization, however, need to be addressed. A comparison of three 3-D clock di ...

2011

Skew Variability in 3-D ICs with Multiple Clock Domains

Giovanni De Micheli, Hu Xu, Vasileios Pavlidis

The effect of process variations on the clock skew in three dimensional (3-D) circuits with multiple clock domains is investigated. In 3-D ICs, the combined effect of inter-die and intra-die process variations should be considered in the design of clock di ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2011

Process-induced skew variation for scaled 2-D and 3-D ICs

Giovanni De Micheli, Hu Xu, Vasileios Pavlidis

Technology scaling and three-dimensional integration are two design paradigms that offer high device density. Process variations affect these design paradigms in different ways. The effect of process variations on clock skew for a 2-D circuit implemented a ...

ACM Press2010

Physical Design Issues in 3-D Integrated Technologies

Vasileios Pavlidis

Design techniques for three-dimensional (3-D) ICs considerably lag the significant strides achieved in 3-D manufacturing technologies. Advanced design methodologies for 2-D circuits are not sufficient to manage the added complexity caused by the third dime ...

Springer-Verlag New York, Ms Ingrid Cunningham, 175 Fifth Ave, New York, Ny 10010 Usa2010

Synchronization and Power Integrity Issues in 3-D ICs

Giovanni De Micheli, Hu Xu, Vasileios Pavlidis, Ioannis Tsioutsios

Several challenges should be resolved for three dimensional integration to evolve to a mainstream technology. Among these challenges, the issues of synchronization and power integrity become predominant due to the multiple planes and the heterogeneity of 3 ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2010

Clock and Power Distribution Networks for 3-D ICs

Giovanni De Micheli, Vasileios Pavlidis

Global interconnect design for threedimensional integrated circuits is a crucial task. Despitethe importance of this task, limited results related to global issues have been presented. Challenges in reliably distributing power, ground, and the clock signal ...

2009

Power Distribution Paths for 3-D IC

Giovanni De Micheli, Vasileios Pavlidis

Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (TSVs) in most of the manufacturing techniques for three-dimensional (3-D) cir ...

ACM Order Department, P.O. Box 64145, Baltimore, MD 21264 USA2009