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Die-Level TSV Fabrication Platform for CMOS-MEMS Integration

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Die-Level TSV Fabrication Platform for CMOS-MEMS Integration

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Flip-chip integration of Si bare dies on polymeric substrates at low temperature using ICA vias made in dry film photoresist

Methods and systems for power-efficient inductive chip-to-chip communications

A Die-Level Post-CMOS Processing Protocol for Multi-Layer 3D Integration

3D-ICE: a Compact Thermal Model for Early-Stage Design of Liquid-Cooled ICs

Modeling of Two-Phase Evaporative Heat Transfer in Three-Dimensional Multicavity High Performance Microprocessor Chip Stacks

Parallel vs. Serial Inter-plane communication using TSVs

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Post-CMOS Processing and 3-D Integration Based on Dry-Film Lithography

Integration of Intra Chip Stack Fluidic Cooling using Thin-Layer Solder Bonding

Flip-chip integration of Si bare dies on polymeric substrates at low temperature using ICA vias made in dry film photoresist

3D-ICE: a Compact Thermal Model for Early-Stage Design of Liquid-Cooled ICs

Post-CMOS Processing and 3-D Integration Based on Dry-Film Lithography

Modeling of Two-Phase Evaporative Heat Transfer in Three-Dimensional Multicavity High Performance Microprocessor Chip Stacks

A Die-Level Post-CMOS Processing Protocol for Multi-Layer 3D Integration

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Methods and systems for power-efficient inductive chip-to-chip communications

Parallel vs. Serial Inter-plane communication using TSVs

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Integration of Intra Chip Stack Fluidic Cooling using Thin-Layer Solder Bonding