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A logic gate with three inputs A, B, and C, and one output implementing a function MAJ(A,B,C)=AB+BC+A*C comprising two mutually exclusive transmission gates (TGs) connected in series, based on two parallel double-gate controllable polarity devices, a polarity of each being controlled by input A and a conduction being controlled by input B, or vice-versa, in opposite polarities, and that route either an input A or C from one side of the transmission gates to the output.
Simon Nessim Henein, Hubert Pierre-Marie Benoît Schneegans, Ilan Vardi, Mohamed Gamal Abdelrahman Ahmed Zanaty
Giovanni De Micheli, Mathias Soeken, Dewmini Sudara Marakkalage, Eleonora Testa, Heinz Riener
Danick Briand, Herbert Shea, Rubaiyet Iftekharul Haque, Alexis Pierre Henri Marette, Xiaobin Ji, Ronan Julien Hinchet