Self-Heating Aware Design of ICs in Deep Sub-Micron FDSOI and Bulk Technologies
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The semiconductor industry, governed by the Moore's law, has achieved the almost unbelievable feat of exponentially increasing performance while lowering the costs for years. The main enabler for this achievement has been the scaling of the CMOS transistor ...
Self-heating effects became more prominent with the introduction of the modern devices like FDSOI and low thermal conductivity materials such as SiO2. Consequently, the design of high speed digital circuits which are the time-critical blocks of high perfor ...
During the last decades, the usage of silicon photodetectors, both as stand-alone sensor or integrated in arrays, grew tremendously. They are now found in almost any application and any market range, from leisure products to high-end scientific apparatuses ...
Considering current environmental issues (e.g. climate change, air pollution) related to energy consumption, this thesis focuses on data characterisation and integrated optimisation methods for waste heat valorisation at the building, city and regional sca ...
CMOS Image Sensors (CIS) overtook the charge coupled devices (CCDs) in low noise performance. Photoelectron counting capability is the next step for CIS for ultimate low light performance and new imaging paradigms. This work presents a review of CMOS image ...
While CMOS single-photon avalanche diode (SPAD) technology has steadily advanced, improving noise, timing resolution, and sensitivity, spatial resolution has been increasing as well. The increase in the number of pixels has made a comprehensive analysis of ...
Although non-conductive heat flow plays an important role in the evolution of rock glacier temperature and dynamics, few studies have quantified it. At the Ritigraben rock glacier (Switzerland), intra-permafrost talik formation was observed at around 12m d ...
For a 4T pixel-based CMOS image sensors (CIS) readout chain, with column-level amplification and CDS, we show that the input-referred total noise in a standard 65 nm process can be reduced to 0.37 e-rms. Based on transient noise simulation using Eldo, the ...
This paper presents an overview of the read noise in CMOS image sensors (CISs) based on four-transistors (4T) pixels, column-level amplification and correlated multiple sampling. Starting from the input-referred noise analytical formula, process level opti ...
Thermal behaviours of high-performance digital circuits in bulk CMOS and FDSOI technologies are compared on a 64-bit Kogge-Stone adder designed in 40nm CMOS node. Temperature profiles of the adder in bulk and FDSOI are extracted with thermal simulations an ...