Publication

Exploration of Negative Capacitance Devices and Technologies

Related publications (491)

Improvement of contact resistance in flexible a-IGZO thin-film transistors by CF4/O-2 plasma treatment

In this work, we analyze the effect of CF4/O-2 plasma treatment on the contact interface between the amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) semiconductor and Titanium-Gold electrodes. First, the influence of CF4/O-2 plasma treatment is evaluated usin ...

PERGAMON-ELSEVIER SCIENCE LTD2018

Aptamer–field-effect transistors overcome Debye length limitations for small-molecule sensing

Nako Nakatsuka, Yang Yang, Bowen Zhu

Detection of analytes by means of field-effect transistors bearing ligand-specific receptors is fundamentally limited by the shielding created by the electrical double layer (the “Debye length” limitation). We detected small molecules under physiological h ...

2018

A back-illuminated 3D-stacked single-photon avalanche diode in 45nm CMOS technology, 2017 IEEE International Electron Devices Meeting (IEDM)

Edoardo Charbon, Myung Jae Lee, Preethi Padmanabhan, Augusto Ronchini Ximenes

We report on the world's first back-illuminated 3D-stacked single-photon avalanche diode (SPAD) in 45nm CMOS technology. This SPAD achieves a dark count rate of 55.4cps/μm 2 , a maximum photon detection probability of 31.8% at 600nm, over 5% in the 420-920 ...

2018

Modeling and optimization of Tunnel-FET architectures exploiting carrier gas dimensionality

Cem Alper

The semiconductor industry, governed by the Moore's law, has achieved the almost unbelievable feat of exponentially increasing performance while lowering the costs for years. The main enabler for this achievement has been the scaling of the CMOS transistor ...

EPFL2017

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

Mihai Adrian Ionescu, Christian Enz, Igor Stolichnov, Farzan Jazaeri, Ali Saeidi, Francesco Bellando

This letter reports for the first time a full experimental study of performance boosting of tunnel FETs (TFETs) and MOSFETs by negative capacitance (NC) effect. We discuss the importance of capacitance matching between a ferroelectric NC and a device capac ...

2017

Static negative capacitance of a ferroelectric nano-domain nucleus

Nava Setter, Tomas Sluka, Pavel Mokry

Miniaturization of conventional field effect transistors (FETs) approaches the fundamental limits beyond which opening and closing the transistor channel require higher gate voltage swing and cause higher power dissipation and heating. This problem could b ...

Amer Inst Physics2017

Emerging Technologies for Computing

Giovanni De Micheli

The evolution of computing has lead to very different realizations to cope with performance and energy consumption density, two competing factors that are not obvious to reconcile. The current semiconductor technologies, mainly FinFETs and FDSoI, provide u ...

2017

Impact of oxygen plasma on nitrided and annealed atomic layer deposited SiO2/high-k/metal gate for high-voltage input and output fin-shaped field effect transistor devices

Sandip De

In this study, the authors investigate the impact of radical oxygen plasma on nitrided and annealed atomic layer deposited (ALD) SiO2 as a thick gate oxide (1.65-3 V) with a high-k/metal gate transistor. Time-dependent-dielectric-breakdown voltage, seconda ...

A V S Amer Inst Physics2017

A High-PDE, Backside-Illuminated SPAD in 65/40-nm 3D IC CMOS Pixel With Cascoded Passive Quenching and Active Recharge

Edoardo Charbon, Scott Anthony Lindner, Martin Wolf

We present a complete pixel based on a single-photon avalanche diode (SPAD) fabricated in a backside-illuminated (BSI) 3D IC technology. The chip stack comprises an image sensing tier produced in a 65-nm image sensor technology and a data processing tier i ...

2017

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Mihai Adrian Ionescu, Cem Alper, Arnab Biswas, Florin Udrea

This paper reports a compact ambipolar model for homojunction strained-silicon (sSi) nanowire (NW) tunnel FETs (TFETs) capable of accurately describing both I-V and G-V characteristics in all regimes of operation, n- and p-ambipolarity, the superlinear ons ...

Institute of Electrical and Electronics Engineers2017

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.