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Wide-field time-gated SPAD imager for phasor-based FLIM applications

Related publications (33)

Ambipolar Gate-Controllable SiNW FETs for Configurable Logic Circuits With Improved Expressive Capability

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici

In this letter, we report on the fabrication and characterization of ambipolar silicon-nanowire (SiNW) field-effect transistors (FETs) with a double-independent-gate (DIG) structure for polarity control. Several structures are fabricated, showing the effec ...
Institute of Electrical and Electronics Engineers2012

Generalized Airport Gate Assignment

Michel Bierlaire, Prem Kumar

We consider the problem of assigning gates to a large airline at its hub airport in both planning and operations mode. The first objective in planning mode assigns airport gates for a given passenger flow data and pedestrian distances between the gates, su ...
2011

Uniaxially tensile strained accumulation-mode gate-all-around Si nanowire nMOSFETs

Mihai Adrian Ionescu, Didier Bouvet, Wladyslaw Grabinski, Mohammad Najmzadeh

In this work we report an experimental study on accumulation-mode (AM) gate-all-around (GAA) nMOSFETs based on silicon nanowires with uniaxial tensile strain. Their electrical characteristics are studied from room temperature up to ~400 K and carrier mobil ...
2011

Low-Noise Microwave Performance of 0.1 mu m Gate AlInN/GaN HEMTs on SiC

Nicolas Grandjean, Jean-François Carlin, Eric Feltin, Marcus Gonschorek

We report the first microwave noise characterization of AlInN/GaN HEMTs. Transistors with a 0.1 mu m gate implemented on a semi-insulating SiC substrate achieve a maximum current density of 1.92 A/mm at V-GS = 0 V, a measured transconductance g(M) = 480 mS ...
2010

Control of Ferromagnetism in a (Ga,Mn)As - Based Multiferroic System via a Ferroelectric Gate

Nava Setter, Igor Stolichnov, Harry Joseph Trodahl, Sebastian Riester

We report the implementation of a ferroelectric gate field effect transistor (FeFET) with a ferromagnetic (Ga,Mn)As conducting channel. The Curie temperature T-C in the channel is modulated by non-volatile poling of the gate. The ferroelectric state, and t ...
Amer Inst Physics, 2 Huntington Quadrangle, Ste 1No1 D, Melville, Ny 11747-4501 Usa2009

Oscillator Based on Suspended Gate MOS Transistors

Mihai Adrian Ionescu, Marco Mazza, Yogesh Singh Chauhan, Alexandru Rusu

The paper deals with the oscillator applications based on vibrating mode of the suspended gate SG-MOSFET transistor. In order to simulate the electrical behavior of the transistor a small-signal equivalent circuit of the gate is proposed and validated. An ...
2008

Prospects for logic-on-a-wire

Giovanni De Micheli, Mihai Adrian Ionescu, David Atienza Alonso, Didier Bouvet, Kirsten Emilie Moselund, Yusuf Leblebici, Mohamed Haykel Ben Jamaa

In this paper we present the top-down fabrication of gate-all-around (GAA) and body-tied @W-gate devices by a combination of etching and oxidation steps resulting in a local silicon-on-insulator structure. The GAA has advantages in terms of enhanced curren ...
2008

Gate-lag and drain-lag effects in (GaN)/InAlN/GaN and InAlN/AlN/GaN HEMTs

Nicolas Grandjean, Jean-François Carlin, Marcus Gonschorek

Gate and drain-lag effects are studied in (GaN)/InAlN/GaN and InAlN/AlN/GaN HEMTs grown on sapphire. Electron trapping on the surface states between the gate and the drain forming the net negative charge up-to similar to 2 x 10(13) cm(-2) is found to be re ...
2007

Fabrication of silicon nano wires and gate-all-around MOS devices

Didier Bouvet, Kirsten Emilie Moselund

The invention relates to methods for manufacturing semiconductor devices. Processes are disclosed for implementing suspended single crystal silicon nano wires (NWs) using a combination of anisotropic and isotropic etches and spacer creation for sidewall pr ...
2007

Design for Reliability of Nanometer-Scale Electronics under High Defect Density

Alexandre Schmid, Yusuf Leblebici, Milos Stanisavljevic

High defect density exhibited by nanoelectronic technologies, and parameter variability already affecting the operation of very-deep submicron CMOS systems demand for a combination of specific solutions, focusing at each various levels of abstraction in th ...
2006

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