Publication

A massively scalable Time-to-Digital Converter with a PLL-free calibration system in a commercial 130 nm process

Related publications (33)

About
Privacy
Disclaimer

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

A massively scalable Time-to-Digital Converter with a PLL-free calibration system in a commercial 130 nm process

Graph Chatbot

Chat with Graph Search

Random flip-flop: adding quantum randomness to digital circuits for improved cyber security, artificial intelligence and more

Low Noise Clock Generation: Modeling, Analysis and Implementation

Towards Deeply Scaled 3D MPSoCs with Integrated Flow Cell Array Technology

A Real-Time Multi-Camera Depth Estimation ASIC with Custom On-Chip Embedded DRAM

Systematic Design Space Exploration of Dynamic Dataflow Programs for Multi-core Platforms

Design Techniques for Ultra High Frequency Clock Generation in 28 nm FDSOI Technology

Memory Systems and Interconnects for Scale-Out Servers

Analysis and Characterization of Variability in Subthreshold Source-Coupled Logic Circuits