Publications associées à Physical design (electronics)

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

EPFL2023

A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time

Mirjana Stojilovic

Side-channel CPU disassembly is a side-channel attack that allows an adversary to recover instructions executed by a processor. Not only does such an attack compromise code confidentiality, it can also reveal critical information on the system’s internals. ...

IEEE2022

Design and management of three-dimensional multi-processor systems-on-chip with integrated flow cell arrays

Halima Najibi

Three-Dimensional Multi-Processor Systems-on-Chip (3D MPSoCs) are promising solutions for highly intensive Artificial Intelligence (AI) and Big Data applications. They combine remarkably dense computation capabilities and massive communication bandwidths. ...

EPFL2022

Detailed Placement for Dedicated LUT-Level FPGA Interconnect

Paolo Ienne, Grace Zgheib, Stefan Nikolic

In this work, we develop timing-driven CAD support for FPGA architectures with direct connections between LUTs. We do so by proposing an efficient ILP-based detailed placer, which moves a carefully selected subset of LUTs from their original positions, so ...

ASSOC COMPUTING MACHINERY2022

A 500 x 500 Dual-Gate SPAD Imager With 100% Temporal Aperture and 1 ns Minimum Gate Length for FLIM and Phasor Imaging Applications

Edoardo Charbon, Claudio Bruschini, Andrei Ardelean, Paul Mos, Arin Can Ülkü, Michael Alan Wayne

In this article, we report on SwissSPAD3 (SS3), a 500 x 500 pixel single-photon avalanche diode (SPAD) array, fabricated in 0.18-mu m CMOS technology. In this sensor, we introduce a novel dual-gate architecture with two contiguous temporal windows, or gate ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Challenges and Opportunities of Edge AI for Next-Generation Implantable BMIs

Mahsa Shoaran, Mohammad Ali Shaeri, Arshia Afzal

Neuroscience and neurotechnology are currently being revolutionized by artificial intelligence (AI) and machine learning. AI is widely used to study and interpret neural signals (analytical applications), assist people with disabilities (prosthetic applica ...

IEEE2022

Geometrical Treatise on the Modelling of 3D Particulate Inclusion-Matrix Microstructures with an Application to Historical Stone Masonry Walls

Mahmoud S. M. Shaqfa

As historical stone masonry structures are vulnerable and prone to damage in earthquakes, investigating their structural integrity is important to reduce injuries and casualties while preserving their historical value. Stone masonry is a composite material ...

EPFL2022

LUT-Based Optimization For ASIC Design Flow

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa

In this paper, we develop a new LUT-based optimization flow tailored for the synthesis of ASICs rather than FPGAs. We enhance LUT-mapping to consider the literal/AIG cost of LUT-nodes. We extend traditional Boolean methods to simplify and re-shape LUT-netw ...

2021

Nanowatt Acoustic Inference Sensing Exploiting Nonlinear Analog Feature Extraction

Christian Enz, Minhao Yang, Jun Zhang

Ultralow-power sensing with inference functionality embedded in sensor nodes is essential for enabling the emerging pervasive intelligence. For acoustic inference sensing, the feature extraction can take advantage of power-efficient analog circuits. Howeve ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Design-to-Fabrication Workflow for Raw-Sawn-Timber using Joinery Solver

Petras Vestartas

Currently, the Swiss timber industry in mountain areas largely exports unprocessed lumber and imports finished timber products due to the lack of digital tools. By using new digital design-to-production workflows, it is possible to investigate new building ...

EPFL2021