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Transistor count

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A 512 x 512 SPAD Image Sensor With Integrated Gating for Widefield FLIM

Polarity-Controllable Devices and Circuits for Doping-Free 2D Electronics

Voltage References for the Ultra-Wide Temperature Range from 4.2 K to 300 K in 40-nm CMOS

A 6.5-GHz Cryogenic All-Pass Filter Circulator in 40-nm CMOS for Quantum Computing Applications

Modeling of Total Ionizing Dose Degradation on 180-nm n-MOSFETs Using BSIM3

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

Toward ultra-low power design methodology for frequency generation in the IoT design space

Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing

Phasor-based widefield FLIM using a gated 512×512 single-photon SPAD imager

A 512 x 512 SPAD Image Sensor With Integrated Gating for Widefield FLIM

Toward ultra-low power design methodology for frequency generation in the IoT design space

A 6.5-GHz Cryogenic All-Pass Filter Circulator in 40-nm CMOS for Quantum Computing Applications

Voltage References for the Ultra-Wide Temperature Range from 4.2 K to 300 K in 40-nm CMOS

Modeling of Total Ionizing Dose Degradation on 180-nm n-MOSFETs Using BSIM3

Polarity-Controllable Devices and Circuits for Doping-Free 2D Electronics

Phasor-based widefield FLIM using a gated 512×512 single-photon SPAD imager

Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM