Background debug mode (BDM) interface is an electronic interface that allows debugging of embedded systems. Specifically, it provides in-circuit debugging functionality in microcontrollers. It requires a single wire and specialized electronics in the system being debugged. It appears in many Freescale Semiconductor products.
The interface allows a Host to manage and query a target. Specialized hardware is required in the target device. No special hardware is required in the host; a simple bidirectional I/O pin is sufficient.
The signals used by BDM to communicate data to and from the target are initiated by the host processor. The host negates the transmission line, and then either
Asserts the line sooner, to output a 1,
Asserts the line later, to output a 0,
Tri-states its output, allowing the target to drive the line. The host can sense a 1 or 0 as an input value.
At the start of the next bit time, the host negates the transmission line, and the process repeats. Each bit is communicated in this manner.
In other words, the increasing complexity of today's software and hardware designs is leading to some fresh approaches to debugging. Silicon manufacturers offer more and more on-chip debugging features for emulation of new processors.
This capability, implemented in various processors under such names as background debug mode (BDM), JTAG and on-chip in-circuit emulation, puts basic debugging functions on the chip itself. With a BDM (1 wire interface) or JTAG (standard JTAG) debug port, you control and monitor the microcontroller solely through the stable on-chip debugging services.
This debugging mode runs even when the target system crashes and enables developers to continue investigating the cause of the crash.
A good development tool environment is important to reduce total development time and cost. Users want to debug their application program under conditions that imitate the actual setup of their system. Because of that, the capability to debug a user program in an actual target system is required.
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Le JTAG (pour Joint Test Action Group) est le nom de la norme IEEE 1149.1 intitulée « Standard Test Access Port and Boundary-Scan Architecture », qui été normalisée en 1990. Le terme JTAG, désignant le groupe de travail qui a conçu la norme, est abusivement (mais très largement) utilisé au lieu du terme générique Boundary Scan, ou du sigle TAP (Test Access Port, port d'accès de test). La technique de boundary scan (littéralement, « scrutation des frontières ») est conçue pour faciliter et automatiser le test des cartes électroniques numériques.
Un émulateur in-circuit également appelé in-circuit emulator (ICE) ou on-circuit debugger (OCD) ou background debug module (BDM) est un dispositif matériel permettant de déboguer le logiciel d'un système embarqué. Un tel dispositif est nécessaire car les systèmes embarqués présentent un certain nombre de lacunes. Ainsi, ils ne comportent ni clavier, ni écran, ni lecteur de disquettes, de disque dur ou n'importe quelle autre interface avec l'utilisateur ou périphérique de stockage qui sont présents sur un ordinateur de bureau.
Explore les techniques de conception pour la testabilité dans les systèmes VLSI, couvrant les méthodes ad hoc et structurées, la conception de numérisation et les normes de test modernes.
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