Method to manage the load of peripheral elements within a multicore system

The aim of the present invention is to propose a method to provide reliability, power management and load balancing support for multicore systems based on Networks- on-Chip (NoCs) as well as a way to efficiently implement architectural support for this method by introducing complex packet handling mechanisms achieved by modifying the basic network interfaces attached to the cores of multicore computation systems. The present invention provides also a solution in interrupt-based support in NoCs for multicore computation systems against transient failures or other system-level issues while the system is executing a certain application. It also proposes policies to leverage the proposed hardware extensions. This aim is achieved thanks to a method to manage the load of peripheral elements within a multicore system, said multicore system comprising several processing cores accessing peripheral elements through a Network on Chip (NoC), each processing unit and peripheral element attached to a Network Interface in charge of formatting and driving the packets sent to or received from the Network on Chip, wherein, while considering at least two peripheral elements having a similar function, the Network Interface dedicated to a first peripheral element reroutes the incoming packets to a second Network Interface dedicated to a second peripheral element.