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A random access memory having a memory array having a plurality of local memory groups, each local memory group including a plurality of bitcells arranged in a bitcell column, a pair of local bitlines operatively connected to the plurality of bitcells, a pair of global read bitlines, a local group read port arranged between the pair of local bitlines and the pair of global read bitlines for selectively accessing one of the local bitlines depending on a state of a selected bitcell, and a local group precharge circuit operatively arranged between the pair of local bitlines.
Andras Kis, Guilherme Migliato Marega
David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina