Publications related to OR gate

Characterization of bipolar transistors for cryogenic temperature sensors in standard CMOS, 2016 IEEE SENSORS

Edoardo Charbon, Harald Arjan Robert Homulle, Fabio Sebastiano

This paper presents the cryogenic characterization of the bipolar substrate PNPs that are typically employed as sensing elements in CMOS integrated temperature sensors. PNPs realized in a standard 160-nm CMOS technology were characterized over the temperat ...

2017

Static negative capacitance of a ferroelectric nano-domain nucleus

Nava Setter, Tomas Sluka, Pavel Mokry

Miniaturization of conventional field effect transistors (FETs) approaches the fundamental limits beyond which opening and closing the transistor channel require higher gate voltage swing and cause higher power dissipation and heating. This problem could b ...

Amer Inst Physics2017

Computationally Efficient Multiple-Independent-Gate Device Model

Giovanni De Micheli, Mariagrazia Graziano, Pierre-Emmanuel Julien Marc Gaillardon, Gianluca Piccinini

Nanowire Field Effect Transistors (FETs) with multiple independent gates around a silicon channel feature ultimate gate control and are regarded as promising candidates for next generation transistors. Being inherently more complex than conventional gate-a ...

Institute of Electrical and Electronics Engineers2016

A Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang, Hassan Ghasemzadeh Mohammadi

This paper deals with the effects of faults on circuits implemented with controllable-polarity transistors. We propose a new fault model that suits the characteristics of these devices, and report the results of a SPICE-based analysis of the effects of fau ...

2016

Technology mapping of reversible circuits to Clifford+T quantum circuits

Mathias Soeken, Nabila Abdessaied

The Clifford+T quantum gate library has attracted much interest in the design of quantum circuits, particularly since the contained operations can be implemented in a fault-tolerant manner. Since fault tolerant implementations of the T gate have very high ...

IEEE2016

Method for speeding up boolean satisfiability

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

A method for transforming a tautology check of an original logic circuit into a contradiction check of the original logic circuit and vice versa comprises interpreting the original logic circuit in terms of AND, OR, MAJ, MIN, XOR, XNOR, INV original logic ...

2016

Disorder engineering and conductivity dome in ReS2 with electrolyte gating

Andras Kis, Oleg Yazyev, Dumitru Dumcenco, Dmitry Ovchinnikov, Fernando Gargiulo, Adrien Victor Allain, Diego José Pasquier

Atomically thin rhenium disulphide (ReS2) is a member of the transition metal dichalcogenide family of materials. This two-dimensional semiconductor is characterized by weak interlayer coupling and a distorted 1T structure, which leads to anisotropy in ele ...

Nature Publishing Group2016

Hybrid phase-change — Tunnel FET (PC-TFET) switch with subthreshold swing < 10mV/decade and sub-0.1 body factor: Digital and analog benchmarking

Mihai Adrian Ionescu, Anna Krammer, Teodor Rosca, Josef Andreas Schuler, Wolfgang Amadeus Vitale, Cem Alper, Arnab Biswas, Emanuele Andrea Casu, Nicolò Oliva

In this paper we report the first hybrid Phase-Change - Tunnel FET (PC-TFET) device configurations for achieving a deep sub-thermionic steep subthreshold swing at room temperature and subthreshold power savings. The proposed hybrid device feedbacks the ste ...

IEEE2016

Photon-Counting Arrays for Time-Resolved Imaging

Edoardo Charbon, Claudio Bruschini, Ivan Michel Antolovic, Samuel Burri

The paper presents a camera comprising 512 x 128 pixels capable of single-photon detection and gating with a maximum frame rate of 156 kfps. The photon capture is performed through a gated single-photon avalanche diode that generates a digital pulse upon p ...

MDPI2016

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OR gate

Characterization of bipolar transistors for cryogenic temperature sensors in standard CMOS, 2016 IEEE SENSORS

Static negative capacitance of a ferroelectric nano-domain nucleus

Computationally Efficient Multiple-Independent-Gate Device Model

A Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Technology mapping of reversible circuits to Clifford+T quantum circuits

Method for speeding up boolean satisfiability

Disorder engineering and conductivity dome in ReS2 with electrolyte gating

Hybrid phase-change — Tunnel FET (PC-TFET) switch with subthreshold swing < 10mV/decade and sub-0.1 body factor: Digital and analog benchmarking

Thermal Issues in Deep Sub-Micron FDSOI Circuits

Photon-Counting Arrays for Time-Resolved Imaging

Graph Chatbot

Chat with Graph Search

Characterization of bipolar transistors for cryogenic temperature sensors in standard CMOS, 2016 IEEE SENSORS

Static negative capacitance of a ferroelectric nano-domain nucleus

Computationally Efficient Multiple-Independent-Gate Device Model

A Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Thermal Issues in Deep Sub-Micron FDSOI Circuits

Photon-Counting Arrays for Time-Resolved Imaging

Technology mapping of reversible circuits to Clifford+T quantum circuits

Method for speeding up boolean satisfiability

Disorder engineering and conductivity dome in ReS2 with electrolyte gating

Hybrid phase-change — Tunnel FET (PC-TFET) switch with subthreshold swing < 10mV/decade and sub-0.1 body factor: Digital and analog benchmarking