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The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gates, for design entry, documentation, and verification purposes. Since 1987, VHDL has been standardized by the Institute of Electrical and Electronics Engineers (IEEE) as IEEE Std 1076; the latest version of which is IEEE Std 1076-2019. To model analog and mixed-signal systems, an IEEE-standardized HDL based on VHDL called VHDL-AMS (officially IEEE 1076.1) has been developed. VHDL is named after the United States Department of Defense program that created it, the Very High Speed Integrated Circuits Program (VHSIC). In the early 1980s, the VHSIC Program sought a new HDL for use in the design of the integrated circuits it aimed to develop. The product of this effort was VHDL Version 7.2, released in 1985. The effort to st

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Students will acquire basic knowledge about methodologies and tools for the design, optimization, and verification of custom digital systems/hardware. They learn how to design synchronous digital circuits on register transfer level, analyse their timing and implement them in VHDL and on FPGAs.

EE-110: Logic systems (for MT)

Ce cours couvre les fondements des systèmes numériques. Sur la base d'algèbre Booléenne et de circuitscombinatoires et séquentiels incluant les machines d'états finis, les methodes d'analyse et de synthèse de systèmelogiques sont étudiées et appliquée

MICRO-435: Quantum and nanocomputing

The course teaches non von-Neumann architectures. The first part of the course deals with quantum computing, sensing, and communications. The second focuses on field-coupled and conduction-based nanocomputing, in-memory and molecular computing, cellular automata, and spintronic computing.

VHDL-AMS Virtual Prototyping of a Generator Circuit Breaker Ablation Monitoring System

Qianqian Ha, Yannick Maret, Juan Sebastian Rodriguez Estupinan, Alain Vachoux

Generator Circuit Breakers (GCBs) are commonly used in electrical power generation systems to protect key equipment such as transformers and generators from damage due to overload or short-circuit. However the interruption and feeding of high currents lead to the ablation of the electrical contact system of the breaker. This deterioration process needs to be monitored in order to guarantee the healthy condition of the breaker. In this paper, we propose a virtual prototype of a GCB fitted with an ablation monitoring system. This is an early model of the complete system, which is highly desired before the physical implementation, since it facilitates the study of detection methods and the exploration of system limitations. The virtual prototype is implemented in VHDL-AMS with certain low-level models described in SPICE. The virtual prototype has been validated by measurements performed on the real system. It is therefore adequate for performing design optimization and to obtain useful observations for further usage of the monitoring system.

IEEE Conference Press2015

Pyramic: Full Stack Open Microphone Array Architecture And Dataset

René Beuchat, Corentin Ferry, Robin Scheibler

In this paper we introduce an open source and reproducible microphone array hardware design and an anechoic dataset recorded with this array. The Pyramic array has 48 microphones spread onto six identical modules connected to an FPGA-ARM combo. The arrangement of the six modules can be reconfigured to create a large number of geometries. We describe in detail the architecture of the array and make openly available all necessary hardware design files, VHDL code, and C libraries together with extensive documentation. This effectively enables replicability of part or all of the array. The curated dataset of anechoic measurements done using the Pyramic array comprises source locations with dense azimuth sampling at multiple heights, playing both test and speech signals. The manual calibration of source and microphone locations is assessed and improved upon using time-difference of arrival methods. The array response to each source location is also provided. Finally, the dataset is used to assess the performance of two well-known direction of arrival estimation algorithms on the Pyramic architecture.

IEEE2018

Analog VHDL

Alain Vachoux

Kluwer Academic Publishers1998

Verilog

Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the regist

Hardware description language

In computer engineering, a hardware description language (HDL) is a specialized computer language used to describe the structure and behavior of electronic circuits, and most commonly, digital logic

Field-programmable gate array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured after manufacturing. The FPGA configuration is generally specified using a hardware description language (H