DRAM Based on Hysteresis in Impact Ionization Single-Transistor-Latch
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We present a new normally-off GaN transistor-the tri-gate normally-off GaN metal-insulator-semiconductor field-effect transistor (MISFET). Due to the excellent channel control of a new 3-D gate structure, a breakdown voltage of 565 V has been achieved at a ...
Technology scaling improves the energy, performance, and area of the digital circuits. With further scaling into sub-45nm regime, we are moving toward very low supply (VDD) and threshold voltages (VT), smaller VDD/VT ratio, high leakage current, and large ...
A new tri-gate normally-off GaN metal-insulator-semiconductor field effect transistor (MISFET) is presented in this paper. By using a three-dimensional gate structure with combination of a sub-micron gate recess, the new device achieves a very low off-stat ...
Ultra-low power (ULP) biomedical implants and sensor nodes typically require small memories of a few kb, while previous work on reliable subthreshold (sub-Vt) memories targets several hundreds of kb. Standard-cell based memories (SCMs) are a straightforwar ...
We present enhancement-mode GaN high electron mobility transistors on Si substrates with ZrO2 gate dielectrics of thicknesses t(ox) between 10 and 24 nm. The oxide interlayers between the InAlN/AlN barrier and gate metal allow raising the device threshold ...
Semiconductor nanowires are an emerging class of materials with great potential for applications in future electronic devices. The small footprint and the large charge-carrier mobilities of nanowires make them potentially useful for applications with high- ...
We develop a model for carrier generation by impact ionization in graphene, which shows that this effect is non-negligible because of the vanishing energy gap, even for carrier transport in moderate electric fields. Our theory is applied to graphene field ...
Silicon technology has advanced at exponential rates both in performances and productivity through the past four decades. However the limit of CMOS technology seems to be closer and closer and in the future we might see an increasing number of hybrid appro ...
Self-aligned suspended-body single-walled (SW) carbon nanotube field-effect transistors (CNFETs) with dual lateral gates have been demonstrated. Two independent lateral gates are symmetrically placed less than 100 nm away from the CNT channel. The operatio ...
Complementary MOS device electrical performances are considerably affected by the degradation of the oxide lay- ers and Si/SiO2 interfaces. A general expression for electrically stressed MOS impedance has been derived and applied within the nonradiative mu ...
Institute of Electrical and Electronics Engineers2012