3D-Integration of a Carbon Nanotube based RF-NEMS

In the framework of the NanoTera project CabTuRes, a system-in-package for a nano-resonator was proposed, integrating CMOS driving electronics and vacuum encapsulation. This doctoral research aimed to investigate 3D-integration technologies for a Single-Walled Carbon NanoTube (SWCNT) resonator designed to operate in the radio-frequency range (~1 GHz): harsh-environment-compatible Radio Frequency Through Silicon Vias (RF-TSVs) for CNT-based devices and a vacuum capping using a gold/silicon eutectic bonded glass wafer were developed. The TSVs were developed in a “via-first” approach, in order to minimize the impact of packaging on the nano-resonator performance. As such, the TSVs must operate nominally after the harsh SWCNT processing. The critical SWCNT processing steps for the TSVs are their high-temperature CVD growth at 850 °C for 20 minutes in air and the release step carried out in concentrated wet hydrofluoric acid (HF; 49 %) for 3 minutes. The TSVs must also be able to operate in the RF range, precluding the use of semiconductor materials— commonly used for high-temperature TSVs. A two-fold strategy was devised to protect the TSVs: the use of high-temperature-compatible metals (Ta/Pt) to withstand the high-temperature post-processing and a silicon nitride (Si3N4) passivation to protect the TSV from wet HF. The process flow for the harsh-environment-compatible RF-TSVs had to be completely redesigned compared to standard copper RF-TSVs. The TSVs consisted of two parts; a Ta/Pt TSV through the SOI handle layer forming an ohmic contact with the second part: an electrically insulated highly-boron-doped silicon plug in the SOI device layer. TSV forming was accomplished using anisotropic KOH etching and TSV insulation was with silicon dioxide (electrical insulation) and nitride (chemical insulation) layers. Electrical contact windows were opened at the bottom of the KOH pits using a spray-coated based photolithography. Ohmic contacts were created between the TSV-metal and the SOI silicon device layer underneath. The topside surface of the silicon device layer remained quasi-free of processing; a tight topside encapsulation does not require an hermetic refilling of the vias. First, harsh-environment compatible tantalum/silicon ohmic contacts were developed with a LPCVD-Si3N4 passivation. Then TSVs were fabricated and characterized. They were not only able to withstand the harsh SWCNT fabrication process, but were also able to maintain stable ohmic contacts at 450 °C in air for the entire experiment duration (1 week). Second, the RF performance of the TSVs was investigated. The scattering-parameters were inferred: at 1GHz, a transmission and reflection coefficient of respectively 2.5 dB and 35 dB were measured. Lastly, a 4” wafer-level glass vacuum-encapsulation was designed, fabricated and characterized. The cap wafer was bonded to the NEMS substrate using gold/silicon eutectic bonding. Different bonding layouts and processing parameters were tested to improve the yield of the bonding process. Gold stud bumps were successfully tested for a chip level NEMS-CMOS assembly, also with an ohmic behavior.