Publication

Negative Capacitance as Universal Digital and Analog Performance Booster for Complementary MOS Transistors

Related publications (119)

About
Privacy
Disclaimer

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

Negative Capacitance as Universal Digital and Analog Performance Booster for Complementary MOS Transistors

Graph Chatbot

Chat with Graph Search

Gate Leakage Tunneling Impact on the InAs/GaSb Heterojunction Electron-Hole Bilayer Tunneling Field-Effect Transistor

A back-illuminated 3D-stacked single-photon avalanche diode in 45nm CMOS technology, 2017 IEEE International Electron Devices Meeting (IEDM)

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

Static negative capacitance of a ferroelectric nano-domain nucleus

Total ionizing dose effects on a 28 nm Hi-K metal-gate CMOS technology up to 1 Grad

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Characterization of bipolar transistors for cryogenic temperature sensors in standard CMOS, 2016 IEEE SENSORS

Negative Capacitance Field Effect Transistors; Capacitance Matching and non-Hysteretic Operation

Negative Capacitance Tunnel FETs: Experimental Demonstration of Outstanding Simultaneous Boosting of On-current, Transconductance, Overdrive, and Swing

Negative Capacitance Tunnel FETs: Experimental Demonstration of Outstanding Simultaneous Boosting of On-current, Transconductance, Overdrive, and Swing

Negative Capacitance Tunnel FETs: Experimental Demonstration of Outstanding Simultaneous Boosting of On-current, Transconductance, Overdrive, and Swing

Negative Capacitance Tunnel FETs: Experimental Demonstration of Outstanding Simultaneous Boosting of On-current, Transconductance, Overdrive, and Swing

Gate Leakage Tunneling Impact on the InAs/GaSb Heterojunction Electron-Hole Bilayer Tunneling Field-Effect Transistor

Total ionizing dose effects on a 28 nm Hi-K metal-gate CMOS technology up to 1 Grad

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

Characterization of bipolar transistors for cryogenic temperature sensors in standard CMOS, 2016 IEEE SENSORS

Negative Capacitance Field Effect Transistors; Capacitance Matching and non-Hysteretic Operation

A back-illuminated 3D-stacked single-photon avalanche diode in 45nm CMOS technology, 2017 IEEE International Electron Devices Meeting (IEDM)

Static negative capacitance of a ferroelectric nano-domain nucleus