Package on a package | EPFL Graph Search

Êtes-vous un étudiant de l'EPFL à la recherche d'un projet de semestre?

Travaillez avec nous sur des projets en science des données et en visualisation, et déployez votre projet sous forme d'application sur GraphSearch.

Découvrez-en plus sur les applications Graph.

Package on a package (PoP) is an integrated circuit packaging method to vertically combine discrete logic and memory ball grid array (BGA) packages. Two or more packages are installed atop each other, i.e. stacked, with a standard interface to route signals between them. This allows higher component density in devices, such as mobile phones, personal digital assistants (PDA), and digital cameras, at the cost of slightly higher height requirements. Stacks with more than 2 packages are uncommon, due to heat dissipation considerations. Two widely used configurations exist for PoP: Pure memory stacking: two or more memory only packages are stacked on each other Mixed logic-memory stacking: logic (CPU) package on the bottom, memory package on top. For example, the bottom could be a system on a chip (SoC) for a mobile phone. The logic package is on the bottom because it needs many more BGA connections to the motherboard. During PCB assembly, the bottom package of a PoP stack is placed directly on the PCB, and the other package(s) of the stack are stacked on top. The packages of a PoP stack become attached to each other (and to the PCB) during reflow soldering. The package on a package technique tries to combine the benefits of traditional packaging with the benefits of die-stacking techniques, while avoiding their drawbacks. Traditional packaging places each die in its own package, a package designed for normal PCB assembly techniques that place each package directly on the PCB side-by-side. The 3D die-stacking system in package (SiP) techniques stacks multiple die in a single package, which has several advantages and also some disadvantages compared to traditional PCB assembly. In embedded PoP techniques, chips are embedded in a substrate on the bottom of the package. This PoP technology enables smaller packages with shorter electrical connections and is supported by companies such as Advanced Semiconductor Engineering (ASE). The most obvious benefit is motherboard space savings. PoP uses much less PCB area, almost as little as stacked-die packages.

À propos de ce résultat

Cette page est générée automatiquement et peut contenir des informations qui ne sont pas correctes, complètes, à jour ou pertinentes par rapport à votre recherche. Il en va de même pour toutes les autres pages de ce site. Veillez à vérifier les informations auprès des sources officielles de l'EPFL.

Concepts associés (8)

Cours associés (6)

Séances de cours associées (54)

MICRO-333: Wireless sensor practicals

In this course, students will design, fabricate, and characterize a wireless sensor wearable. Students will design a custom-chosen wearable around a standardized wireless microcotroller platform, in

CH-315: Modeling lab

In this course we give a hands-on introduction on the use of modeling and data in chemistry. After an introduction in the different tools used by computational chemists, we discuss three topics in mor

MICRO-534: Advanced MEMS & microsystems

In depth analysis of the operation principles and technology of advanced micro- and nanosystems. Familiarisation to their implementation into products and their applications.

Package on a package

Three-dimensional integrated circuit

A three-dimensional integrated circuit (3D IC) is a MOS (metal-oxide semiconductor) integrated circuit (IC) manufactured by stacking as many as 16 or more ICs and interconnecting them vertically using, for instance, through-silicon vias (TSVs) or Cu-Cu connections, so that they behave as a single device to achieve performance improvements at reduced power and smaller footprint than conventional two dimensional processes. The 3D IC is one of several 3D integration schemes that exploit the z-direction to achieve electrical performance benefits in microelectronics and nanoelectronics.

System in package

thumb|Un SiP avec un processeur, mémoire et mémoire flash, combiné sur un seul substrat. Un SiP, acronyme de « System in Package » (système dans un boîtier, en français), aussi connu sous le nom de System-in-a-Package ou de Multi-Chip Module (MCM), désigne un système de circuits intégrés confinés dans un seul boîtier ou module. Le SiP permet de réaliser la totalité (ou presque) des fonctions habituelles d'un système électronique, tels que ceux présents à l'intérieur d'un téléphone mobile, d'un PC, d'un baladeur numérique, etc.

Emerging Memory I CS-471: Advanced multiprocessor architecture

Explore le paysage des données volumineuses, l'importance de la mémoire dans les services en ligne, les défis auxquels sont confrontés les systèmes de mémoire, les technologies DRAM émergentes et la mémoire de classe stockage.

Protocoles de stockage de mémoire et de communication CS-119(c): Information, Computation, Communication

Explore les principes de stockage de mémoire et les protocoles de communication pour un transfert efficace des données dans les réseaux informatiques.

Conception de systèmes d'information : leçons tirées de CompuSys CS-491: Introduction to IT consulting

Explore les défis dans la conception de systèmes d'information efficaces à l'aide de l'étude de cas de CompuSys.