Publications associées à Montage cascode

Negative Resistance in Cascode Transistors

Elison de Nazareth Matioli, Armin Jafari, Palliyage Srilak Nirmana Perera

Cascode topology which includes a high-voltage GaN and a low-voltage Si transistor is an attractive device concept, which uses the low ON-resistance of GaN while still being compatible with Si gate drivers. It demonstrates the highest threshold voltage amo ...

2020

Subthermionic negative capacitance ion sensitive field-effect transistor

Mihai Adrian Ionescu, Ali Saeidi, Francesco Bellando, Carlotta Gastaldi

One of the main advantages of Ion-Sensitive Field-Effect Transistor (ISFET) technology is the capability to exploit technological advancements initially developed for conventional FETs for logic applications, such as the employ of high-k dielectrics for th ...

2020

Coss Loss Tangent of Field-Effect Transistors: Generalizing High-Frequency Soft-Switching Losses

Elison de Nazareth Matioli, Armin Jafari, Luca Nela, Palliyage Srilak Nirmana Perera

The dissipated energy (Ediss) related to the resonant charging/discharging of a transistor output capacitance, becomes a dominant loss factor for power converters operating in the MHz range. A recent work has introduced a small-signal measurement method to ...

2020

Active Phase-Conjugating Rotman Lens With Reflection Amplifiers for Backscattering Enhancement

Pouyan Keshavarzian

Active retrodirective antenna arrays find a variety of use in applications involving wireless communication and sensing systems. This article presents a novel active version of the phase-conjugating Rotman lens with negative conductance amplifiers for appl ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Modeling of Total Ionizing Dose Degradation on 180-nm n-MOSFETs Using BSIM3

Nergiz Sahin Solmaz, Mustafa Berke Yelten, Sadik Ilik

This paper presents a modeling approach to simulate the impact of total ionizing dose (TID) degradation on low-power analog and mixed-signal circuits. The modeling approach has been performed on 180-nm n-type metal-oxide-semiconductor field-effect transist ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems

Giovanni De Micheli, Giovanni Vincenzo Resta, Pierre-Emmanuel Julien Marc Gaillardon

Here, we review the most recent developments in the field of 2-D electronics. We focus first on the synthesis of 2-D materials, discussing the different growth techniques currently available and assessing their strengths and weaknesses. Moreover, we descri ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

Near Hysteresis-Free Negative Capacitance InGaAs Tunnel FETs with Enhanced Digital and Analog Figures of Merit below VDD=400mV

Mihai Adrian Ionescu, Igor Stolichnov, Ali Saeidi, Hiroshi Iwai

We report the universal boosting impact of a true negative capacitance (NC) effect on digital and analog performances of Tunnel FETs (TFETs), mirrored for the first time in near hysteresis-free experiments and exploiting the S-shaped polarization character ...

2019

CJM: A Compact Model for Double-Gate Junction FETs

Jean-Michel Sallese, Farzan Jazaeri, Matthias Bucher

The double-gate (DG) junction field-effect transistor (JFET) is a classical electron device, with a simple structure that presents many advantages in terms of device fabrication but also its principle of operation. The device has been largely used in low-n ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

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Montage cascode

Negative Resistance in Cascode Transistors

Hardware-in-the-Loop Characterization of Source-Affected Output Characteristics of Cascaded H-Bridge Converter

Subthermionic negative capacitance ion sensitive field-effect transistor

Coss Loss Tangent of Field-Effect Transistors: Generalizing High-Frequency Soft-Switching Losses

Active Phase-Conjugating Rotman Lens With Reflection Amplifiers for Backscattering Enhancement

Exposure assessment of body-implanted capsules in the 100-MHz–5-GHz range

Modeling of Total Ionizing Dose Degradation on 180-nm n-MOSFETs Using BSIM3

Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems

Near Hysteresis-Free Negative Capacitance InGaAs Tunnel FETs with Enhanced Digital and Analog Figures of Merit below VDD=400mV

CJM: A Compact Model for Double-Gate Junction FETs

Graph Chatbot

Chattez avec Graph Search

Negative Resistance in Cascode Transistors

Subthermionic negative capacitance ion sensitive field-effect transistor

Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems

CJM: A Compact Model for Double-Gate Junction FETs

Exposure assessment of body-implanted capsules in the 100-MHz–5-GHz range

Active Phase-Conjugating Rotman Lens With Reflection Amplifiers for Backscattering Enhancement

Modeling of Total Ionizing Dose Degradation on 180-nm n-MOSFETs Using BSIM3

Hardware-in-the-Loop Characterization of Source-Affected Output Characteristics of Cascaded H-Bridge Converter

Coss Loss Tangent of Field-Effect Transistors: Generalizing High-Frequency Soft-Switching Losses

Near Hysteresis-Free Negative Capacitance InGaAs Tunnel FETs with Enhanced Digital and Analog Figures of Merit below VDD=400mV