Publications associées à SOI digital pixel sensor based on charge pumping

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A Modular, Direct Time-of-Flight Depth Sensor in 45/65-nm 3-D-Stacked CMOS Technology

Edoardo Charbon, Myung Jae Lee, Preethi Padmanabhan, Augusto Ronchini Ximenes

This article introduces a modular, direct time-of-flight (TOF) depth sensor. Each module is digitally synthesized and features a 2

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8) single-photon avalanche diode (SPAD) pixel array, an edge-sensitive decision tree, a shared time-to ...

2019

SOI digital pixel sensor based on charge pumping

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Evaluation of HPK n plus -p planar pixel sensors for the CMS Phase-2 upgrade

MALTA-Cz: a radiation hard full-size monolithic CMOS sensor with small electrodes on high-resistivity Czochralski substrate

A 500 x 500 Dual-Gate SPAD Imager With 100% Temporal Aperture and 1 ns Minimum Gate Length for FLIM and Phasor Imaging Applications

reference data for "A Critical Comparison of Annual Glare Simulation Methods"

A Pixel Design of a Branching Ultra-Highspeed Image Sensor

Beyond Cameras: Real-Time High-Resolution 3D and Panoramic MultiView Vision Systems with Their Applications

Simulation of CMOS APS Operation and Crosstalk in SPICE With Generalized Devices

Hessian Splines For Scanning Transmission X-Ray Microscopy

Full SPICE Simulation of a CMOS Active Pixel Sensor with Generalized Devices

A Modular, Direct Time-of-Flight Depth Sensor in 45/65-nm 3-D-Stacked CMOS Technology

MALTA-Cz: a radiation hard full-size monolithic CMOS sensor with small electrodes on high-resistivity Czochralski substrate

Beyond Cameras: Real-Time High-Resolution 3D and Panoramic MultiView Vision Systems with Their Applications

Full SPICE Simulation of a CMOS Active Pixel Sensor with Generalized Devices

A Pixel Design of a Branching Ultra-Highspeed Image Sensor

reference data for "A Critical Comparison of Annual Glare Simulation Methods"

A Modular, Direct Time-of-Flight Depth Sensor in 45/65-nm 3-D-Stacked CMOS Technology

Hessian Splines For Scanning Transmission X-Ray Microscopy

A 500 x 500 Dual-Gate SPAD Imager With 100% Temporal Aperture and 1 ns Minimum Gate Length for FLIM and Phasor Imaging Applications

Simulation of CMOS APS Operation and Crosstalk in SPICE With Generalized Devices

Evaluation of HPK n plus -p planar pixel sensors for the CMS Phase-2 upgrade