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A 128-kbit GC-eDRAM With Negative Boosted Bootstrap Driver for 11.3x Lower-Refresh Frequency at a 2.5% Area Overhead in 28-nm FD-SOI

The Digital Ethics Canvas: A Guide For Ethical Risk Assessment And Mitigation In The Digital Domain

Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space

Replica Bit-Line Technique for Internal Refresh in Logic-Compatible Gain-Cell Embedded DRAM

Data-Retention-Time Characterization of Gain-Cell eDRAMs across the Design and Variations Space

Low-Power Design of Digital VLSI Circuits around the Point of First Failure

Optimized Memory Access For Dynamically Scheduled High Level Synthesis

Neural Dynamics of Grouping and Segmentation Explain Properties of Visual Crowding

A start-up boosting circuit with 133× speed gain for 2-transistor voltage reference

Fabrication, Characterization and Integration of Resistive Random Access Memories