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Concept# NAND gate

Summary

In digital electronics, a NAND gate (NOT-AND) is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of an AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. A NAND gate is made using transistors and junction diodes. By De Morgan's laws, a two-input NAND gate's logic may be expressed as =+, making a NAND gate equivalent to inverters followed by an OR gate.
The NAND gate is significant because any boolean function can be implemented by using a combination of NAND gates. This property is called functional completeness. It shares this property with the NOR gate. Digital systems employing certain logic circuits take advantage of NAND's functional completeness.
NAND gates with two or more inputs are available as integrated circuits in transistor-transistor logic, CMOS, and other logic families.
The function NAND(a1, a2, ..., an) is logically equivalent to NOT(a1 AND a2 AND ... AND an).
One way of expressing A NAND B is , where the symbol signifies AND and the bar signifies the negation of the expression under it: in essence, simply .
There are three symbols for NAND gates: the MIL/ANSI symbol, the IEC symbol and the deprecated DIN symbol sometimes found on old schematics. For more information see logic gate symbols. The ANSI symbol for the NAND gate is a standard AND gate with an inversion bubble connected.
NAND gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs.
The standard, 4000 series, CMOS IC is the 4011, which includes four independent, two-input, NAND gates. These devices are available from many semiconductor manufacturers. These are usually available in both through-hole DIL and SOIC format. Datasheets are readily available in most datasheet databases.

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