Publication

A High-PDE, Backside-Illuminated SPAD in 65/40-nm 3D IC CMOS Pixel With Cascoded Passive Quenching and Active Recharge

Related publications (123)

Unraveling the Electrochemical Electrode Coupling in Integrated Organic Electrochemical Transistors

Matteo Cucchi, Hsin Tseng

Organic electrochemical transistors (OECTs) have gained enormous attention due to their potential for bioelectronics and neuromorphic computing. However, their implementation into real-world applications is still impeded by a lack of understanding of the c ...
WILEY-V C H VERLAG GMBH2023

Single-photon avalanche diode fabricated in standard 55 nm bipolar-CMOS-DMOS technology with sub-20 V breakdown voltage

Edoardo Charbon, Claudio Bruschini, Won Yong Ha, Myung Jae Lee

This paper presents a single-photon avalanche diode (SPAD) in 55 nm bipolar-CMOSDMOS (BCD) technology. In order to realize a SPAD having sub-20 V breakdown voltage for mobile applications while preventing high tunneling noise, a high-voltage N-well availab ...
Optica Publishing Group2023

Exploring negative capacitance and neuromorphic devices based on CMOS-compatible ferroelectric HfO2

Carlotta Gastaldi

Ferroelectric materials are explored for numerous applications thanks to their properties associated with electrically switchable spontaneous polarization. Perovskites are an established class of ferroelectrics used for sensors and actuators. However, they ...
EPFL2022

Energy Efficient Sensing using Steep Slope Devices

Teodor Rosca

Today, we are witnessing the Internet of Things (IoT) revolution, which facilitates and improves ourlives in many aspects, but comes with several challenges related to the technology deployment atlarge scales. Handling ever growing amounts of information t ...
EPFL2022

Stable Al 2 O 3 Encapsulation of MoS 2 ‐FETs Enabled by CVD Grown h‐BN

Aleksandra Radenovic, Andras Kis, Zhenyu Wang

Molybdenum disulfide (MoS2) has great potential as a two-dimensional semiconductor for electronic and optoelectronic application, but its high sensitivity to environmental adsorbents and charge transfer from neighboring dielectrics can lead to device varia ...
2022

A Cryogenic Broadband Sub-1-dB NF CMOS Low Noise Amplifier for Quantum Applications

Edoardo Charbon, Andrea Ruffino, Yatao Peng

A cryogenic broadband low noise amplifier (LNA) for quantum applications based on a standard 40-nm CMOS technology is reported. The LNA specifications are derived from the readout of semiconductor quantum bits at 4.2 K, whose quantum information signals ar ...
2021

A cryo-CMOS chip that integrates silicon quantum dots and multiplexed dispersive readout electronics

Edoardo Charbon, Andrea Ruffino, Yatao Peng

An integrated circuit fabricated using industry-standard 40 nm complementary metal-oxide-semiconductor technology can combine silicon quantum devices, digital addressing and analogue multiplexed dispersive readout electronics. As quantum computers grow in ...
NATURE PORTFOLIO2021

Engineering Breakdown Probability Profile for PDP and DCR Optimization in a SPAD Fabricated in a Standard 55nm BCD Process

Edoardo Charbon, Claudio Bruschini, Ekin Kizilkan, Pouyan Keshavarzian, Francesco Gramuglia, Myung Jae Lee

CMOS Single-Photon Avalanche Diodes (SPADs) have broken into the mainstream by enabling the adoption of imaging, timing, and security technologies in a variety of applications within the consumer, medical and industrial domains. The continued scaling of te ...
2021

Modelling of vertical and ferroelectric junctionless technology for efficient 3D neural network compute cube dedicated to embedded artificial intelligence

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse

This paper presents the set of simulation means used to develop the concept of N2C2 (neural network compute cube) based on a vertical transistor technology platform. On the basis of state-of-the-art junctionless nanowire transistors (JLNT), TCAD simulation ...
2021

High-Performance III-V MOSFETs and Tunnel-FETs Integrated on Silicon

Clarissa Convertino

Silicon transistor scaling is approaching its end and a transition to novel materials and device concepts is more than ever essential. High-mobility compound semiconductors are considered promising candidates to replace silicon, targeting low-power logic a ...
EPFL2020

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