Publications associées à Process variation (semiconductor)

An Ultralow-Power Triaxial MEMS Accelerometer With High-Voltage Biasing and Electrostatic Mismatch Compensation

This article presents a triaxial micro electromechani-cal system (MEMS) capacitive accelerometer using a high-voltage biasing technique to achieve high resolution with ultralow power. The accelerometer system generates a differential pair of high voltages ...

Piscataway2024

A 500 x 500 Dual-Gate SPAD Imager With 100% Temporal Aperture and 1 ns Minimum Gate Length for FLIM and Phasor Imaging Applications

Edoardo Charbon, Claudio Bruschini, Andrei Ardelean, Paul Mos, Arin Can Ülkü, Michael Alan Wayne

In this article, we report on SwissSPAD3 (SS3), a 500 x 500 pixel single-photon avalanche diode (SPAD) array, fabricated in 0.18-mu m CMOS technology. In this sensor, we introduce a novel dual-gate architecture with two contiguous temporal windows, or gate ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

New Insights for Parasitic Effects of Label-Free Biosensors Based on Capacitive Micromachined Ultrasonic Transducers

Sandro Carrara, Zhengwen Jiang, Yihe Zhao, Jie Li

Capacitive micromachined ultrasonic transducers (CMUTs) are regarded as an attractive candidate in bio-applications such as imaging and molecule monitoring. However, the previous researches on biochemical sensing are mostly air-coupled application based on ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Production of phosphorene nanoribbons

Vasiliki Tileli

Phosphorene is a mono-elemental, two-dimensional (2D) substance with outstanding, highly directional properties and a bandgap that depends on the number of layers of the material(1-8). Nanoribbons, meanwhile, combine the flexibility and unidirectional prop ...

NATURE PUBLISHING GROUP2019

Analog Neural Networks with Deep-submicron Nonlinear Synapses

Pascal Frossard, Babak Falsafi, Ahmet Caner Yüzügüler, Mario Paulo Drumond Lages De Oliveira, Firat Çelik

Deep neural network (DNN) inference tasks are computationally expensive. Digital DNN accelerators offer better density and energy efficiency than general-purpose processors but still not sufficient to be deployable on resource-constrained settings. Analog ...

2019

Analog Neural Networks with Deep-submicron Nonlinear Synapses

Pascal Frossard, Babak Falsafi, Ahmet Caner Yüzügüler, Mario Paulo Drumond Lages De Oliveira, Firat Çelik

2019

Effect of hysteretic and non-hysteretic negative capacitance on tunnel FETs DC performance

Mihai Adrian Ionescu, Igor Stolichnov, Farzan Jazaeri, Ali Saeidi

This work experimentally demonstrates that the negative capacitance effect can be used to significantly improve the key figures of merit of tunnel field effect transistor (FET) switches. In the proposed approach, a matching condition is fulfilled between a ...

2018

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Edouard Giacomin

In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can ...

2018

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Process variation (semiconductor)

An Ultralow-Power Triaxial MEMS Accelerometer With High-Voltage Biasing and Electrostatic Mismatch Compensation

A 500 x 500 Dual-Gate SPAD Imager With 100% Temporal Aperture and 1 ns Minimum Gate Length for FLIM and Phasor Imaging Applications

New Insights for Parasitic Effects of Label-Free Biosensors Based on Capacitive Micromachined Ultrasonic Transducers

Production of phosphorene nanoribbons

On Advanced Large-Field Photolithography

Ultra-Low-Power Intelligent Acoustic Sensing using Cochlea-Inspired Feature Extraction and DNN Classification

Analog Neural Networks with Deep-submicron Nonlinear Synapses

Analog Neural Networks with Deep-submicron Nonlinear Synapses

Effect of hysteretic and non-hysteretic negative capacitance on tunnel FETs DC performance

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Graph Chatbot

Chattez avec Graph Search

An Ultralow-Power Triaxial MEMS Accelerometer With High-Voltage Biasing and Electrostatic Mismatch Compensation

A 500 x 500 Dual-Gate SPAD Imager With 100% Temporal Aperture and 1 ns Minimum Gate Length for FLIM and Phasor Imaging Applications

New Insights for Parasitic Effects of Label-Free Biosensors Based on Capacitive Micromachined Ultrasonic Transducers

On Advanced Large-Field Photolithography

Production of phosphorene nanoribbons

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Analog Neural Networks with Deep-submicron Nonlinear Synapses

Ultra-Low-Power Intelligent Acoustic Sensing using Cochlea-Inspired Feature Extraction and DNN Classification

Analog Neural Networks with Deep-submicron Nonlinear Synapses

Effect of hysteretic and non-hysteretic negative capacitance on tunnel FETs DC performance