Platinum silicide films are widely used in silicon devices for ohmic and Schottky contacts. It has been demonstrated in the recent years that Schottky barriers employing ultra-thin platinum silicide films (thickness < 10 nm) are useful for photodetection in the near infrared. We have studied the formation of thin platinum silicide films and their electrical properties as a function of the annealing temperature in presence of an interfacial native silicon oxide layer and with plasma etching damage on the Si substrate surface. The thickness of the interfacial oxide layer was varied as well as the depth of the plasma etching damage. The interest of these investigations lies in understanding the role played by the imperfections due to the two usual cleaning processes, namely incomplete SiO2 chemical removal and Si damace due to plasma etching bombardment, on the final silicide film characteristics. The quality and reproducibility of platinum silicide films in routine fabrication depends strongly of the process control, where the substrate cleanliness plays a crucial role. The native silicon oxide can be present at the silicon substrate surface due to an incomplete chemical etching or due to the rapid re-growth of the oxide after the chemical etching. It is well accepted that this interfacial oxide layer can cause problems for Pt-contact metallization, although the characteristics of the resulting platinum silicide film as a function of the oxide thickness and the annealing temperature are not well known. On the other hand, to guarantee the complete removal of the native silicon oxide mainly in the delicate ultra-thin silicide films fabrication, a plasma etching bombardment is performed on the substrate surface prior to metal deposition. This can introduce a certain amount of damage in the substrate surface which can influence the Pt-Si reaction as well as the morphology, crystallography and electrical characteristics of these films. We prepared samples using different chemical etching procedures to obtain complete and incomplete native oxide layer removal. Plasma etching on the substrate surface was performed for various duration and using a range of discharge powers to obtain different plasma etching damage depth. The silicidation reaction was performed at different annealing temperatures. Five characterization techniques were used to study these samples: Transmission Electron Microscopy (TEM), Scanning Electron Microscopy (SEM), Photoelectron Microscopy (PEM), Internal Photoemission (IPE) and Four-Point Probe Measurements. Morphological, compositional, structural and crystallographic information is obtained from the first three techniques. This is subsequently correlated to the electrical properties of the films obtained using the last two techniques. We observe that silicide films with interfacial oxide layer up to 2.2 nm-thick, annealed at an appropriate temperature, are equivalent to oxide-free samples for application in device metallization. Resistivity measurements show the same minimum value of 30 μΩcm, for samples with and without interfacial oxide in the 350 – 550 °C annealing temperature range. The role played by the interfacial native oxide layer is observed during the early stages of Pt – Si formation. In the absence of the interface oxide, platinum silicide can easily form even at low temperatures (T < 200 °C). If the interfacial oxide is present, the reactant interdiffusion proceeds through the oxide pinholes; the Pt-Si reaction rate and the phase formation mostly depend on the pinhole density and diameter. In the 350 – 550 °C annealing temperature range, silicide films with and without interfacial oxide layer reach a stable, homogeneous and quite similar structure, consisting of epitaxial and polycrystalline PtSi grains and a very flat silicide/Si interface. This annealing temperature range gives crystallographic and morphologic conditions in which silicide films with and without interfacial oxide layer show the best transport properties. Silicide films with an interfacial oxide show a continuous Pt2Si sub-layer on the top. It is observed from 350 °C and remains unchanged up to annealing temperatures as high as 600 – 650 °C. The existence of this sub-layer can guarantee the film continuity up to 700 °C, even if PtSi grains below it are already epitaxial and isolated from each other. In oxide-free samples this layer does not exist and the transformation to an island-type film is observed after annealing at 550 – 600 °C. The presence of the Pt2Si layer is beneficial and even desirable for preserving the transport properties. A few nanometers of plasma etching damage on the substrate surface are beneficial to ultra-thin (3 – 5 nm-thick) silicide films. Plasma damage contributes to slowing down the beginning of the island formation and extends the temperature range in which platinum silicide films maintain their continuity and the transport properties. Plasma damage can slightly increase the resistivity of films in the 4 – 5 nm thickness range. On the other hand, the plasma etching damage depth in the range mentioned above can help films thinner than 3.5 nm to improve their transport properties.
EPFL1996
