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The cascode is a two-stage amplifier that consists of a common-emitter stage feeding into a common-base stage. Compared to a single amplifier stage, this combination may have one or more of the following characteristics: higher input–output isolation, higher input impedance, high output impedance, higher bandwidth. In modern circuits, the cascode is often constructed from two transistors (BJTs or FETs), with one operating as a common emitter or common source and the other as a common base or common gate. The cascode improves input–output isolation (reduces reverse transmission), as there is no direct coupling from the output to input. This eliminates the Miller effect and thus contributes to a much higher bandwidth. History The use of a cascode (sometimes verbified to cascoding) is a common technique for improving analog circuit performance, applicable to both vacuum tubes and transistors. The name "cascode" was coined in an article written by Frederick Vinton Hunt and Rog

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A 2.4-GHz low power polar transmitter for wireless body area network applications

Christian Enz, Vladimir Kopta, Franz Xaver Pengg

A 2.4 GHz low power polar transmitter is proposed in this paper. A dynamic biasing circuit, controlled by a digital envelope signal, is used as a direct digital-to-RF envelope converter. It effectively linearizes the input-output characteristic of the overdriven cascode class-C power amplifier used as the output stage, by dynamically adjusting the bias voltage of the cascode transistor. An equivalent baseband model of the transmitter is presented and used to optimize system parameters and give initial assessment of the achievable performance in terms of efficiency and linearity. Based on these simulations, parameters for transistor-level implementation of the bias circuit are derived. The transmitter is designed in a 65 nm CMOS technology. The post layout simulations indicate that the transmitter successfully meets the requirements of the IEEE 802.15.6 standard for wireless body area networks. The simulated amplifier consumes 4.75 mA from a 1.2 V supply while delivering 1.45 dBm of output power with a peak efficiency of 24 %. The entire transmitter, including the PLL, consumes 7.5 mA.

Springer Verlag2014

Procedural Analog Design (PAD) tool

Maher Kayal, Marc Pastre, Danica Stefanovic

This paper presents a new Procedural Analog Design tool called PAD. It is a chart-based design environment dedicated to the design of analog circuits aiming to optimise design and quality by finding good tradeoffs. This interactive tool allows step-by-step design of analog cells by using guidelines for each analog topology. At each step, the user modifies interactively one subset of design parameters and observes the effect on other circuit parameters. At the end, an optimised design is ready for simulation (verification and fine-tuning). Furthermore, PAD provides a layout generator for matched substructures such as current mirror, cascode stage, differential pair, etc. The analog basic structures calculator embedded in PAD uses the complete set of equations of the EKV MOS model, which links the equations for weak and strong inversion in a continuous way[1,2]. The present version of PAD covers the procedural design of transconductance amplifiers (OTAs) and different operational amplifiers topologies.

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